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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-29 18:18:51 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-04-29 18:18:51 +0000 |
| commit | 288c73e7be40be735b98a548983b4b58aa770e27 (patch) | |
| tree | 439669c3800aba3e577945b572a6fa7b8f304a82 /llvm/lib | |
| parent | afe1ee218045c581078f4967fa54763cf50c6c8d (diff) | |
| download | bcm5719-llvm-288c73e7be40be735b98a548983b4b58aa770e27.tar.gz bcm5719-llvm-288c73e7be40be735b98a548983b4b58aa770e27.zip | |
[X86] Remove unnecessary BT InstRW overrides.
llvm-svn: 331147
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/X86/X86ScheduleZnver1.td | 6 |
1 files changed, 1 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td index cea4c68f4d7..76b7f1079b1 100644 --- a/llvm/lib/Target/X86/X86ScheduleZnver1.td +++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td @@ -554,10 +554,7 @@ def ZnWriteALULat2Ld : SchedWriteRes<[ZnAGU, ZnALU]> { } // BT. -// r,r/i. -def : InstRW<[WriteShift], (instregex "BT(16|32|64)r(r|i8)")>; - -def : InstRW<[WriteShiftLd], (instregex "BT(16|32|64)mr")>; +// m,i. def : InstRW<[WriteShiftLd], (instregex "BT(16|32|64)mi8")>; // BTR BTS BTC. @@ -568,7 +565,6 @@ def ZnWriteBTRSC : SchedWriteRes<[ZnALU]> { } def : InstRW<[ZnWriteBTRSC], (instregex "BT(R|S|C)(16|32|64)r(r|i8)")>; - // m,r,i. def ZnWriteBTRSCm : SchedWriteRes<[ZnAGU, ZnALU]> { let Latency = 6; |
