diff options
| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-06-08 16:40:15 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-06-08 16:40:15 +0000 |
| commit | 59e915c691ce93b3f2e1712aa04df845712adec4 (patch) | |
| tree | a01bf2ccd60c4beaee86dec58a09e9593aeb297a /llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | |
| parent | c9a098b314ecb206f439aa70a893c1620fb2e96b (diff) | |
| download | bcm5719-llvm-59e915c691ce93b3f2e1712aa04df845712adec4.tar.gz bcm5719-llvm-59e915c691ce93b3f2e1712aa04df845712adec4.zip | |
[X86] Fix schedule-x86_64.s tests to use different registers in reg-reg cases
Same fix as rL334110: I noticed while working on zero-idiom + dependency-breaking support (PR36671) that most of our binary instruction schedule tests were reusing the same src registers, which would cause the tests to fail once we enable scalar zero-idiom support on btver2.
llvm-svn: 334302
Diffstat (limited to 'llvm/lib/Transforms/Vectorize/LoopVectorize.cpp')
0 files changed, 0 insertions, 0 deletions
