revert r314698 - [InstCombine] remove one-use restriction for icmp (shr exact X, C1), C2 --> icmp X, (C2<<C1)

There is a bot failure that appears to be related to this change:
http://lab.llvm.org:8011/builders/clang-cmake-armv7-a15-selfhost-neon/builds/2117

...so reverting to confirm that and attempting to keep the bot green while investigating.

llvm-svn: 314984

1 files changed, 6 insertions, 6 deletions

diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
index 4b1705ca69c..20d8a2785b8 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp
@@ -2057,15 +2057,15 @@ Instruction *InstCombiner::foldICmpShrConstant(ICmpInst &Cmp,
           (!IsAShr && C.shl(ShAmtVal).lshr(ShAmtVal) == C)) &&
          "Expected icmp+shr simplify did not occur.");
 
-  // If the bits shifted out are known zero, compare the unshifted value:
+  // Check if the bits shifted out are known to be zero. If so, we can compare
+  // against the unshifted value:
   //  (X & 4) >> 1 == 2  --> (X & 4) == 4.
   Constant *ShiftedCmpRHS = ConstantInt::get(Shr->getType(), C << ShAmtVal);
-  if (Shr->isExact())
-    return new ICmpInst(Pred, X, ShiftedCmpRHS);
-
   if (Shr->hasOneUse()) {
-    // Canonicalize the shift into an 'and':
-    // icmp eq/ne (shr X, ShAmt), C --> icmp eq/ne (and X, HiMask), (C << ShAmt)
+    if (Shr->isExact())
+      return new ICmpInst(Pred, X, ShiftedCmpRHS);
+
+    // Otherwise strength reduce the shift into an 'and'.
     APInt Val(APInt::getHighBitsSet(TypeBits, TypeBits - ShAmtVal));
     Constant *Mask = ConstantInt::get(Shr->getType(), Val);
     Value *And = Builder.CreateAnd(X, Mask, Shr->getName() + ".mask");