diff options
-rw-r--r-- | llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp | 12 | ||||
-rw-r--r-- | llvm/test/Transforms/InstCombine/icmp-shr.ll | 2 |
2 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp index 4b1705ca69c..20d8a2785b8 100644 --- a/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp +++ b/llvm/lib/Transforms/InstCombine/InstCombineCompares.cpp @@ -2057,15 +2057,15 @@ Instruction *InstCombiner::foldICmpShrConstant(ICmpInst &Cmp, (!IsAShr && C.shl(ShAmtVal).lshr(ShAmtVal) == C)) && "Expected icmp+shr simplify did not occur."); - // If the bits shifted out are known zero, compare the unshifted value: + // Check if the bits shifted out are known to be zero. If so, we can compare + // against the unshifted value: // (X & 4) >> 1 == 2 --> (X & 4) == 4. Constant *ShiftedCmpRHS = ConstantInt::get(Shr->getType(), C << ShAmtVal); - if (Shr->isExact()) - return new ICmpInst(Pred, X, ShiftedCmpRHS); - if (Shr->hasOneUse()) { - // Canonicalize the shift into an 'and': - // icmp eq/ne (shr X, ShAmt), C --> icmp eq/ne (and X, HiMask), (C << ShAmt) + if (Shr->isExact()) + return new ICmpInst(Pred, X, ShiftedCmpRHS); + + // Otherwise strength reduce the shift into an 'and'. APInt Val(APInt::getHighBitsSet(TypeBits, TypeBits - ShAmtVal)); Constant *Mask = ConstantInt::get(Shr->getType(), Val); Value *And = Builder.CreateAnd(X, Mask, Shr->getName() + ".mask"); diff --git a/llvm/test/Transforms/InstCombine/icmp-shr.ll b/llvm/test/Transforms/InstCombine/icmp-shr.ll index 214f315f317..77eaf09eb96 100644 --- a/llvm/test/Transforms/InstCombine/icmp-shr.ll +++ b/llvm/test/Transforms/InstCombine/icmp-shr.ll @@ -483,7 +483,7 @@ declare void @foo(i32) define i1 @exact_multiuse(i32 %x) { ; CHECK-LABEL: @exact_multiuse( ; CHECK-NEXT: [[SH:%.*]] = lshr exact i32 %x, 7 -; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 %x, 131072 +; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[SH]], 1024 ; CHECK-NEXT: call void @foo(i32 [[SH]]) ; CHECK-NEXT: ret i1 [[CMP]] ; |