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| author | Evan Cheng <evan.cheng@apple.com> | 2006-03-21 00:30:59 +0000 | 
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2006-03-21 00:30:59 +0000 | 
| commit | fb872b41c0ae384ecb899fe8226f969c6012fcea (patch) | |
| tree | 159492123a531e719f735e164f03c19f92283f44 /llvm/lib/Target | |
| parent | af7de1fba8df680a7ba7a6ad96ce32be8df8e744 (diff) | |
| download | bcm5719-llvm-fb872b41c0ae384ecb899fe8226f969c6012fcea.tar.gz bcm5719-llvm-fb872b41c0ae384ecb899fe8226f969c6012fcea.zip | |
Junk unused vector register classes.
llvm-svn: 26910
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86RegisterInfo.td | 25 | 
1 files changed, 0 insertions, 25 deletions
| diff --git a/llvm/lib/Target/X86/X86RegisterInfo.td b/llvm/lib/Target/X86/X86RegisterInfo.td index 5601234c342..18c9417cb9d 100644 --- a/llvm/lib/Target/X86/X86RegisterInfo.td +++ b/llvm/lib/Target/X86/X86RegisterInfo.td @@ -139,31 +139,6 @@ def RST : RegisterClass<"X86", [f64], 32,    }];  } -// Vector integer registers: V8I8, the 8 x i8 class, V4I16, the 4 x i16 class, -// V2I32, the 2 x i32 class, V16I8, the 16 x i8 class, V8I16, the 8 x i16 class, -// V4I32, the 4 x i32 class, and V2I64, the 2 x i64 class. -def V8I8  : RegisterClass<"X86", [v8i8],  64, -                          [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7]>; -def V4I16 : RegisterClass<"X86", [v4i16], 64, -                          [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7]>; -def V2I32 : RegisterClass<"X86", [v2i32], 64, -                          [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7]>; -def V16I8 : RegisterClass<"X86", [v16i8], 128, -                          [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>; -def V8I16 : RegisterClass<"X86", [v8i16], 128, -                          [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>; -def V4I32 : RegisterClass<"X86", [v4i32], 128, -                          [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>; -def V2I64 : RegisterClass<"X86", [v2i64], 128, -                          [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>; - -// Vector floating point registers: V4F4, the 4 x f32 class, and V2F8, -// the 2 x f64 class. -def V4F32 : RegisterClass<"X86", [v4f32], 128, -                         [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>; -def V2F64 : RegisterClass<"X86", [v2f64], 128, -                         [XMM0, XMM1, XMM2, XMM3, XMM4, XMM5, XMM6, XMM7]>; -  // Generic vector registers: VR64 and VR128.  def VR64  : RegisterClass<"X86", [v8i8, v4i16, v2i32], 64,                            [MM0, MM1, MM2, MM3, MM4, MM5, MM6, MM7]>; | 

