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authorTom Stellard <thomas.stellard@amd.com>2016-10-12 16:35:29 +0000
committerTom Stellard <thomas.stellard@amd.com>2016-10-12 16:35:29 +0000
commitfac248cb5fb78968b8d90c14e53fcbbbba7fef66 (patch)
tree84dfc0396fb4f76367dd5d63fbdeafb9e7bd22ac /llvm/lib/Target
parentfa53c86dc1cac3b9434a6b4a3d653e326128fbfb (diff)
downloadbcm5719-llvm-fac248cb5fb78968b8d90c14e53fcbbbba7fef66.tar.gz
bcm5719-llvm-fac248cb5fb78968b8d90c14e53fcbbbba7fef66.zip
AMDGPU/SI: Change mimg intrinsic signatures
This makes more fields overridable and removes redundant bits. Patch by: Changpeng Fang llvm-svn: 284024
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/AMDGPU/MIMGInstructions.td41
1 files changed, 23 insertions, 18 deletions
diff --git a/llvm/lib/Target/AMDGPU/MIMGInstructions.td b/llvm/lib/Target/AMDGPU/MIMGInstructions.td
index 629643c022c..795260e9c05 100644
--- a/llvm/lib/Target/AMDGPU/MIMGInstructions.td
+++ b/llvm/lib/Target/AMDGPU/MIMGInstructions.td
@@ -401,32 +401,36 @@ multiclass ImagePatterns<SDPatternOperator name, string opcode> {
def : ImagePattern<name, !cast<MIMG>(opcode # _V4_V4), v4i32>;
}
-class ImageLoadPattern<SDPatternOperator name, MIMG opcode, ValueType vt> : Pat <
- (name vt:$addr, v8i32:$rsrc, imm:$dmask, imm:$r128, imm:$da, imm:$glc,
- imm:$slc),
- (opcode $addr, $rsrc,
+multiclass ImageLoadPattern<SDPatternOperator name, MIMG opcode, ValueType vt> {
+ def : Pat <
+ (v4f32 (name vt:$addr, v8i32:$rsrc, i32:$dmask, i1:$glc, i1:$slc, i1:$lwe,
+ i1:$da)),
+ (opcode $addr, $rsrc,
(as_i32imm $dmask), 1, (as_i1imm $glc), (as_i1imm $slc),
- (as_i1imm $r128), 0, 0, (as_i1imm $da))
->;
+ 0, 0, (as_i1imm $lwe), (as_i1imm $da))
+ >;
+}
multiclass ImageLoadPatterns<SDPatternOperator name, string opcode> {
- def : ImageLoadPattern<name, !cast<MIMG>(opcode # _V4_V1), i32>;
- def : ImageLoadPattern<name, !cast<MIMG>(opcode # _V4_V2), v2i32>;
- def : ImageLoadPattern<name, !cast<MIMG>(opcode # _V4_V4), v4i32>;
+ defm : ImageLoadPattern<name, !cast<MIMG>(opcode # _V4_V1), i32>;
+ defm : ImageLoadPattern<name, !cast<MIMG>(opcode # _V4_V2), v2i32>;
+ defm : ImageLoadPattern<name, !cast<MIMG>(opcode # _V4_V4), v4i32>;
}
-class ImageStorePattern<SDPatternOperator name, MIMG opcode, ValueType vt> : Pat <
- (name v4f32:$data, vt:$addr, v8i32:$rsrc, i32:$dmask, imm:$r128, imm:$da,
- imm:$glc, imm:$slc),
- (opcode $data, $addr, $rsrc,
+multiclass ImageStorePattern<SDPatternOperator name, MIMG opcode, ValueType vt> {
+ def : Pat <
+ (name v4f32:$data, vt:$addr, v8i32:$rsrc, i32:$dmask, i1:$glc, i1:$slc,
+ i1:$lwe, i1:$da),
+ (opcode $data, $addr, $rsrc,
(as_i32imm $dmask), 1, (as_i1imm $glc), (as_i1imm $slc),
- (as_i1imm $r128), 0, 0, (as_i1imm $da))
->;
+ 0, 0, (as_i1imm $lwe), (as_i1imm $da))
+ >;
+}
multiclass ImageStorePatterns<SDPatternOperator name, string opcode> {
- def : ImageStorePattern<name, !cast<MIMG>(opcode # _V4_V1), i32>;
- def : ImageStorePattern<name, !cast<MIMG>(opcode # _V4_V2), v2i32>;
- def : ImageStorePattern<name, !cast<MIMG>(opcode # _V4_V4), v4i32>;
+ defm : ImageStorePattern<name, !cast<MIMG>(opcode # _V4_V1), i32>;
+ defm : ImageStorePattern<name, !cast<MIMG>(opcode # _V4_V2), v2i32>;
+ defm : ImageStorePattern<name, !cast<MIMG>(opcode # _V4_V4), v4i32>;
}
class ImageAtomicPattern<SDPatternOperator name, MIMG opcode, ValueType vt> : Pat <
@@ -554,6 +558,7 @@ def : SampleRawPattern<int_SI_getlod, IMAGE_GET_LOD_V4_V4, v4i32>;
// Image load
defm : ImageLoadPatterns<int_amdgcn_image_load, "IMAGE_LOAD">;
defm : ImageLoadPatterns<int_amdgcn_image_load_mip, "IMAGE_LOAD_MIP">;
+defm : ImageLoadPattern<int_amdgcn_image_getresinfo, IMAGE_GET_RESINFO_V4_V1, i32>;
// Image store
defm : ImageStorePatterns<int_amdgcn_image_store, "IMAGE_STORE">;
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