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| author | Joey Gouly <joey.gouly@arm.com> | 2013-06-20 17:42:36 +0000 |
|---|---|---|
| committer | Joey Gouly <joey.gouly@arm.com> | 2013-06-20 17:42:36 +0000 |
| commit | f81d036ea76a6d3b644f7b4b64658b5dc915b8d1 (patch) | |
| tree | 7fb39d070b383e6256dbc4e16bc1770091db84bf /llvm/lib/Target | |
| parent | 14a89c5428666eac2659caa73182691e9a88bcf9 (diff) | |
| download | bcm5719-llvm-f81d036ea76a6d3b644f7b4b64658b5dc915b8d1.tar.gz bcm5719-llvm-f81d036ea76a6d3b644f7b4b64658b5dc915b8d1.zip | |
This reverts r155000.
The cdp2 instruction should have the same restrictions as cdp on the
co-processor registers.
VFP instructions on v8/AArch32 share the same encoding space as cdp2.
llvm-svn: 184445
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrInfo.td | 7 |
1 files changed, 1 insertions, 6 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrInfo.td b/llvm/lib/Target/ARM/ARMInstrInfo.td index cc17b003844..8003e5101c7 100644 --- a/llvm/lib/Target/ARM/ARMInstrInfo.td +++ b/llvm/lib/Target/ARM/ARMInstrInfo.td @@ -1007,11 +1007,6 @@ def p_imm : Operand<i32> { let DecoderMethod = "DecodeCoprocessor"; } -def pf_imm : Operand<i32> { - let PrintMethod = "printPImmediate"; - let ParserMatchClass = CoprocNumAsmOperand; -} - def CoprocRegAsmOperand : AsmOperandClass { let Name = "CoprocReg"; let ParserMethod = "parseCoprocRegOperand"; @@ -4447,7 +4442,7 @@ def CDP : ABI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1, let Inst{23-20} = opc1; } -def CDP2 : ABXI<0b1110, (outs), (ins pf_imm:$cop, imm0_15:$opc1, +def CDP2 : ABXI<0b1110, (outs), (ins p_imm:$cop, imm0_15:$opc1, c_imm:$CRd, c_imm:$CRn, c_imm:$CRm, imm0_7:$opc2), NoItinerary, "cdp2\t$cop, $opc1, $CRd, $CRn, $CRm, $opc2", [(int_arm_cdp2 imm:$cop, imm:$opc1, imm:$CRd, imm:$CRn, |
