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| author | Dan Gohman <gohman@apple.com> | 2009-10-09 22:09:05 +0000 |
|---|---|---|
| committer | Dan Gohman <gohman@apple.com> | 2009-10-09 22:09:05 +0000 |
| commit | f4eb6777e55ae6b39f7b19d0c0e137311d97d799 (patch) | |
| tree | 09684e80a33770eab4f96aceb1043d25d33799a8 /llvm/lib/Target | |
| parent | 3028a43f574a4cddecf44fb68952cee6ef9cc597 (diff) | |
| download | bcm5719-llvm-f4eb6777e55ae6b39f7b19d0c0e137311d97d799.tar.gz bcm5719-llvm-f4eb6777e55ae6b39f7b19d0c0e137311d97d799.zip | |
Add a const qualifier.
llvm-svn: 83677
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/TargetRegisterInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/TargetRegisterInfo.cpp b/llvm/lib/Target/TargetRegisterInfo.cpp index 43123991ea8..fac67e2e1aa 100644 --- a/llvm/lib/Target/TargetRegisterInfo.cpp +++ b/llvm/lib/Target/TargetRegisterInfo.cpp @@ -62,14 +62,14 @@ TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, EVT VT) const { /// getAllocatableSetForRC - Toggle the bits that represent allocatable /// registers for the specific register class. -static void getAllocatableSetForRC(MachineFunction &MF, +static void getAllocatableSetForRC(const MachineFunction &MF, const TargetRegisterClass *RC, BitVector &R){ for (TargetRegisterClass::iterator I = RC->allocation_order_begin(MF), E = RC->allocation_order_end(MF); I != E; ++I) R.set(*I); } -BitVector TargetRegisterInfo::getAllocatableSet(MachineFunction &MF, +BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF, const TargetRegisterClass *RC) const { BitVector Allocatable(NumRegs); if (RC) { |
