diff options
| author | Akira Hatanaka <ahatanaka@mips.com> | 2012-02-02 03:13:40 +0000 |
|---|---|---|
| committer | Akira Hatanaka <ahatanaka@mips.com> | 2012-02-02 03:13:40 +0000 |
| commit | f029537e687789d78a5fa25c13cb87c5d6f4587f (patch) | |
| tree | 6d58ebf896d1c270e4fdfffe76d77d2880e78130 /llvm/lib/Target | |
| parent | d9fef17749d847489726ba5fc71ecb6add62569f (diff) | |
| download | bcm5719-llvm-f029537e687789d78a5fa25c13cb87c5d6f4587f.tar.gz bcm5719-llvm-f029537e687789d78a5fa25c13cb87c5d6f4587f.zip | |
Expand EHSELECTION and EHSELECTION nodes. Set the correct exception pointer and
selector registers.
llvm-svn: 149584
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsISelLowering.cpp | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/MipsISelLowering.cpp b/llvm/lib/Target/Mips/MipsISelLowering.cpp index 2f366b39969..227e6cc1402 100644 --- a/llvm/lib/Target/Mips/MipsISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsISelLowering.cpp @@ -197,7 +197,9 @@ MipsTargetLowering(MipsTargetMachine &TM) setOperationAction(ISD::FMA, MVT::f64, Expand); setOperationAction(ISD::EXCEPTIONADDR, MVT::i32, Expand); + setOperationAction(ISD::EXCEPTIONADDR, MVT::i64, Expand); setOperationAction(ISD::EHSELECTION, MVT::i32, Expand); + setOperationAction(ISD::EHSELECTION, MVT::i64, Expand); setOperationAction(ISD::VAARG, MVT::Other, Expand); setOperationAction(ISD::VACOPY, MVT::Other, Expand); @@ -248,8 +250,8 @@ MipsTargetLowering(MipsTargetMachine &TM) setStackPointerRegisterToSaveRestore(HasMips64 ? Mips::SP_64 : Mips::SP); computeRegisterProperties(); - setExceptionPointerRegister(Mips::A0); - setExceptionSelectorRegister(Mips::A1); + setExceptionPointerRegister(IsN64 ? Mips::A0_64 : Mips::A0); + setExceptionSelectorRegister(IsN64 ? Mips::A1_64 : Mips::A1); } bool MipsTargetLowering::allowsUnalignedMemoryAccesses(EVT VT) const { |
