diff options
| author | Craig Topper <craig.topper@intel.com> | 2018-04-28 06:02:40 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-04-28 06:02:40 +0000 |
| commit | ef3866a85999129c3c3959d776b9437fa5301732 (patch) | |
| tree | a8c90d20190719c2200cdb148f1d2a5bafa3f3da /llvm/lib/Target | |
| parent | 8a6532ae84d499b91a22de291b10bb54ebd18a8b (diff) | |
| download | bcm5719-llvm-ef3866a85999129c3c3959d776b9437fa5301732.tar.gz bcm5719-llvm-ef3866a85999129c3c3959d776b9437fa5301732.zip | |
[X86] Remove REX.W from 64-bit mode BND instructions.
As far as I can tell from the docs, the instructions are automatically 64-bit in 64-bit mode. We don't need REX.W.
llvm-svn: 331102
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrMPX.td | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86InstrMPX.td b/llvm/lib/Target/X86/X86InstrMPX.td index d0c421038dd..15129c370c8 100644 --- a/llvm/lib/Target/X86/X86InstrMPX.td +++ b/llvm/lib/Target/X86/X86InstrMPX.td @@ -21,7 +21,7 @@ let mayLoad = 1 in { def 32rm: I<opc, MRMSrcMem, (outs BNDR:$dst), (ins i32mem:$src), OpcodeStr#"\t{$src, $dst|$dst, $src}", []>, Requires<[HasMPX, Not64BitMode]>; - def 64rm: RI<opc, MRMSrcMem, (outs BNDR:$dst), (ins i64mem:$src), + def 64rm: I<opc, MRMSrcMem, (outs BNDR:$dst), (ins i64mem:$src), OpcodeStr#"\t{$src, $dst|$dst, $src}", []>, Requires<[HasMPX, In64BitMode]>; } @@ -34,14 +34,14 @@ let mayLoad = 1 in { def 32rm: I<opc, MRMSrcMem, (outs), (ins BNDR:$src1, i32mem:$src2), OpcodeStr#"\t{$src2, $src1|$src1, $src2}", []>, Requires<[HasMPX, Not64BitMode]>; - def 64rm: RI<opc, MRMSrcMem, (outs), (ins BNDR:$src1, i64mem:$src2), + def 64rm: I<opc, MRMSrcMem, (outs), (ins BNDR:$src1, i64mem:$src2), OpcodeStr#"\t{$src2, $src1|$src1, $src2}", []>, Requires<[HasMPX, In64BitMode]>; } def 32rr: I<opc, MRMSrcReg, (outs), (ins BNDR:$src1, GR32:$src2), OpcodeStr#"\t{$src2, $src1|$src1, $src2}", []>, Requires<[HasMPX, Not64BitMode]>; - def 64rr: RI<opc, MRMSrcReg, (outs), (ins BNDR:$src1, GR64:$src2), + def 64rr: I<opc, MRMSrcReg, (outs), (ins BNDR:$src1, GR64:$src2), OpcodeStr#"\t{$src2, $src1|$src1, $src2}", []>, Requires<[HasMPX, In64BitMode]>; } @@ -56,7 +56,7 @@ let mayLoad = 1 in { def BNDMOV32rm : I<0x1A, MRMSrcMem, (outs BNDR:$dst), (ins i64mem:$src), "bndmov\t{$src, $dst|$dst, $src}", []>, PD, Requires<[HasMPX, Not64BitMode]>; -def BNDMOV64rm : RI<0x1A, MRMSrcMem, (outs BNDR:$dst), (ins i128mem:$src), +def BNDMOV64rm : I<0x1A, MRMSrcMem, (outs BNDR:$dst), (ins i128mem:$src), "bndmov\t{$src, $dst|$dst, $src}", []>, PD, Requires<[HasMPX, In64BitMode]>; } @@ -68,7 +68,7 @@ let mayStore = 1 in { def BNDMOV32mr : I<0x1B, MRMDestMem, (outs), (ins i64mem:$dst, BNDR:$src), "bndmov\t{$src, $dst|$dst, $src}", []>, PD, Requires<[HasMPX, Not64BitMode]>; -def BNDMOV64mr : RI<0x1B, MRMDestMem, (outs), (ins i128mem:$dst, BNDR:$src), +def BNDMOV64mr : I<0x1B, MRMDestMem, (outs), (ins i128mem:$dst, BNDR:$src), "bndmov\t{$src, $dst|$dst, $src}", []>, PD, Requires<[HasMPX, In64BitMode]>; |
