diff options
| author | Tim Northover <tnorthover@apple.com> | 2014-04-02 14:38:58 +0000 |
|---|---|---|
| committer | Tim Northover <tnorthover@apple.com> | 2014-04-02 14:38:58 +0000 |
| commit | ebd37ab38279f09d36a8c317363e48ecaf5f13c1 (patch) | |
| tree | b4d06b4511ab976b3767cd33051b543d26d3d9c9 /llvm/lib/Target | |
| parent | 5e3a484e3b325329e56a685357dc5e3c9bb0f1b3 (diff) | |
| download | bcm5719-llvm-ebd37ab38279f09d36a8c317363e48ecaf5f13c1.tar.gz bcm5719-llvm-ebd37ab38279f09d36a8c317363e48ecaf5f13c1.zip | |
ARM64: make sure first argument to INSERT_SUBVECTOR has right type.
Again, coalescing and other optimisations swiftly made the MachineInstrs
consistent again, but when compiled at -O0 a bad INSERT_SUBREGISTER was
produced.
llvm-svn: 205423
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM64/ARM64ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp b/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp index b6672ee0d7f..66207790c8a 100644 --- a/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp +++ b/llvm/lib/Target/ARM64/ARM64ISelLowering.cpp @@ -5615,7 +5615,7 @@ SDValue ARM64TargetLowering::LowerSCALAR_TO_VECTOR(SDValue Op, } MachineSDNode *N = DAG.getMachineNode(TargetOpcode::INSERT_SUBREG, SDLoc(Op), - Op.getValueType(), DAG.getUNDEF(Op0.getValueType()), + Op.getValueType(), DAG.getUNDEF(Op.getValueType()), Op0, DAG.getTargetConstant(SubIdx, MVT::i32)); return SDValue(N, 0); } |
