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| author | Vincent Lejeune <vljn@ovi.com> | 2013-02-14 16:55:11 +0000 |
|---|---|---|
| committer | Vincent Lejeune <vljn@ovi.com> | 2013-02-14 16:55:11 +0000 |
| commit | ea710fe419c1f4f8ff9e52ddd01abfc5a3b03dc1 (patch) | |
| tree | ea9440caf085d55f9cf933827a669defb7928bbd /llvm/lib/Target | |
| parent | d80bc1561a088556d687c741822e8ab26875aaf7 (diff) | |
| download | bcm5719-llvm-ea710fe419c1f4f8ff9e52ddd01abfc5a3b03dc1.tar.gz bcm5719-llvm-ea710fe419c1f4f8ff9e52ddd01abfc5a3b03dc1.zip | |
R600: Export instructions are no longer terminator
This allows MachineInstScheduler to reorder them, and thus make scheduling more
efficient.
Reviewed-by: Tom Stellard <thomas.stellard at amd.com>
llvm-svn: 175182
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/R600/R600Instructions.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/R600/R600Instructions.td b/llvm/lib/Target/R600/R600Instructions.td index 286ec9be90b..e495beac3e9 100644 --- a/llvm/lib/Target/R600/R600Instructions.td +++ b/llvm/lib/Target/R600/R600Instructions.td @@ -644,7 +644,7 @@ multiclass SteamOutputExportPattern<Instruction ExportInst, 4095, imm:$mask, buf3inst, 0)>; } -let isTerminator = 1, usesCustomInserter = 1 in { +let usesCustomInserter = 1 in { class ExportSwzInst : InstR600ISA<( outs), @@ -658,7 +658,7 @@ class ExportSwzInst : InstR600ISA<( let Inst{63-32} = Word1; } -} // End isTerminator = 1, usesCustomInserter = 1 +} // End usesCustomInserter = 1 class ExportBufInst : InstR600ISA<( outs), |
