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| author | Craig Topper <craig.topper@intel.com> | 2019-10-20 23:54:19 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-10-20 23:54:19 +0000 |
| commit | e78414622ddbc4f696d1d16ef8db918f732a0a88 (patch) | |
| tree | ee5acf6813e556ff7f3b2ad84d9fbdc77183f44b /llvm/lib/Target | |
| parent | e884843d7839043308640952ad84659619eaca44 (diff) | |
| download | bcm5719-llvm-e78414622ddbc4f696d1d16ef8db918f732a0a88.tar.gz bcm5719-llvm-e78414622ddbc4f696d1d16ef8db918f732a0a88.zip | |
[X86] Check Subtarget.hasSSE3() before calling shouldUseHorizontalOp and emitting X86ISD::FHADD in LowerUINT_TO_FP_i64.
This was a regression from r375341.
Fixes PR43729.
llvm-svn: 375381
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index b498a12aeae..5211b1bcebb 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18591,7 +18591,7 @@ static SDValue LowerUINT_TO_FP_i64(SDValue Op, SelectionDAG &DAG, SDValue Sub = DAG.getNode(ISD::FSUB, dl, MVT::v2f64, XR2F, CLod1); SDValue Result; - if (shouldUseHorizontalOp(true, DAG, Subtarget)) { + if (Subtarget.hasSSE3() && shouldUseHorizontalOp(true, DAG, Subtarget)) { Result = DAG.getNode(X86ISD::FHADD, dl, MVT::v2f64, Sub, Sub); } else { SDValue Shuffle = DAG.getVectorShuffle(MVT::v2f64, dl, Sub, Sub, {1,-1}); |
