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authorCraig Topper <craig.topper@intel.com>2018-01-23 05:37:00 +0000
committerCraig Topper <craig.topper@intel.com>2018-01-23 05:37:00 +0000
commite5aea259809d5bd828acdcaa54de2eff5dcc74dc (patch)
tree73f5fcd624952fbfdc2448aae839566c6af09784 /llvm/lib/Target
parent26a701f24f5e8ff0c2c2d0692148ee702b31d63f (diff)
downloadbcm5719-llvm-e5aea259809d5bd828acdcaa54de2eff5dcc74dc.tar.gz
bcm5719-llvm-e5aea259809d5bd828acdcaa54de2eff5dcc74dc.zip
[X86] Remove 'NOREX' comment from the printing of _NOREX instructions.
Some of the NOREX instructions are used in 32-bit mode making this printing confusing. It also doesn't provide a lot of value since you can see the h-register being used by the instruction. llvm-svn: 323174
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86InstrExtension.td8
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.td6
2 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86InstrExtension.td b/llvm/lib/Target/X86/X86InstrExtension.td
index 2a8ab0069b1..ed15cdf81ba 100644
--- a/llvm/lib/Target/X86/X86InstrExtension.td
+++ b/llvm/lib/Target/X86/X86InstrExtension.td
@@ -95,22 +95,22 @@ def MOVZX32rm16: I<0xB7, MRMSrcMem, (outs GR32:$dst), (ins i16mem:$src),
let hasSideEffects = 0, isCodeGenOnly = 1 in {
def MOVZX32_NOREXrr8 : I<0xB6, MRMSrcReg,
(outs GR32_NOREX:$dst), (ins GR8_NOREX:$src),
- "movz{bl|x}\t{$src, $dst|$dst, $src} # NOREX",
+ "movz{bl|x}\t{$src, $dst|$dst, $src}",
[], IIC_MOVZX>, TB, OpSize32, Sched<[WriteALU]>;
let mayLoad = 1 in
def MOVZX32_NOREXrm8 : I<0xB6, MRMSrcMem,
(outs GR32_NOREX:$dst), (ins i8mem_NOREX:$src),
- "movz{bl|x}\t{$src, $dst|$dst, $src} # NOREX",
+ "movz{bl|x}\t{$src, $dst|$dst, $src}",
[], IIC_MOVZX>, TB, OpSize32, Sched<[WriteALULd]>;
def MOVSX32_NOREXrr8 : I<0xBE, MRMSrcReg,
(outs GR32_NOREX:$dst), (ins GR8_NOREX:$src),
- "movs{bl|x}\t{$src, $dst|$dst, $src} # NOREX",
+ "movs{bl|x}\t{$src, $dst|$dst, $src}",
[], IIC_MOVSX>, TB, OpSize32, Sched<[WriteALU]>;
let mayLoad = 1 in
def MOVSX32_NOREXrm8 : I<0xBE, MRMSrcMem,
(outs GR32_NOREX:$dst), (ins i8mem_NOREX:$src),
- "movs{bl|x}\t{$src, $dst|$dst, $src} # NOREX",
+ "movs{bl|x}\t{$src, $dst|$dst, $src}",
[], IIC_MOVSX>, TB, OpSize32, Sched<[WriteALULd]>;
}
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index 0129e11d582..2f75e0dd07a 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -1652,18 +1652,18 @@ let isCodeGenOnly = 1 in {
let hasSideEffects = 0 in
def MOV8rr_NOREX : I<0x88, MRMDestReg,
(outs GR8_NOREX:$dst), (ins GR8_NOREX:$src),
- "mov{b}\t{$src, $dst|$dst, $src} # NOREX", [], IIC_MOV>,
+ "mov{b}\t{$src, $dst|$dst, $src}", [], IIC_MOV>,
Sched<[WriteMove]>;
let mayStore = 1, hasSideEffects = 0 in
def MOV8mr_NOREX : I<0x88, MRMDestMem,
(outs), (ins i8mem_NOREX:$dst, GR8_NOREX:$src),
- "mov{b}\t{$src, $dst|$dst, $src} # NOREX", [],
+ "mov{b}\t{$src, $dst|$dst, $src}", [],
IIC_MOV_MEM>, Sched<[WriteStore]>;
let mayLoad = 1, hasSideEffects = 0,
canFoldAsLoad = 1, isReMaterializable = 1 in
def MOV8rm_NOREX : I<0x8A, MRMSrcMem,
(outs GR8_NOREX:$dst), (ins i8mem_NOREX:$src),
- "mov{b}\t{$src, $dst|$dst, $src} # NOREX", [],
+ "mov{b}\t{$src, $dst|$dst, $src}", [],
IIC_MOV_MEM>, Sched<[WriteLoad]>;
}
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