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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-09-26 17:54:38 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-09-26 17:54:38 +0000 |
| commit | e50c1c4a64861a848a76609dc00d49d1d8d88d05 (patch) | |
| tree | 8ba1d576cf1a42ad41526a8d4a2670382ec09f4c /llvm/lib/Target | |
| parent | 472b05b36caa538b46f6e302c353507da4ac3bc9 (diff) | |
| download | bcm5719-llvm-e50c1c4a64861a848a76609dc00d49d1d8d88d05.tar.gz bcm5719-llvm-e50c1c4a64861a848a76609dc00d49d1d8d88d05.zip | |
R600/SI: Remove apparently dead code in legalizeOperands
No tests hit this, and I don't see any way a GlobalAddress
node would survive beyond lowering on SI. It it would, the
move should probably be inserted by selection.
llvm-svn: 218526
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/R600/SIISelLowering.cpp | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/llvm/lib/Target/R600/SIISelLowering.cpp b/llvm/lib/Target/R600/SIISelLowering.cpp index 10b42750c13..8a3ab46ad22 100644 --- a/llvm/lib/Target/R600/SIISelLowering.cpp +++ b/llvm/lib/Target/R600/SIISelLowering.cpp @@ -1790,14 +1790,6 @@ SDNode *SITargetLowering::legalizeOperands(MachineSDNode *Node, ensureSRegLimit(DAG, Ops[i], RegClass, ScalarSlotUsed); } continue; - } else { - // If it's not a VSrc or SSrc operand check if we have a GlobalAddress. - // These will be lowered to immediates, so we will need to insert a MOV. - if (isa<GlobalAddressSDNode>(Ops[i])) { - SDNode *Node = DAG.getMachineNode(AMDGPU::V_MOV_B32_e32, SDLoc(), - Operand.getValueType(), Operand); - Ops[i] = SDValue(Node, 0); - } } if (i == 1 && DescRev && fitsRegClass(DAG, Ops[0], RegClass)) { |
