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| author | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-10-19 16:59:22 +0000 |
|---|---|---|
| committer | Krzysztof Parzyszek <kparzysz@codeaurora.org> | 2017-10-19 16:59:22 +0000 |
| commit | e4d0e199bf178d41a160dabb6996ee98976d33ac (patch) | |
| tree | 9846488f6ff7577d2095b9517800f975e9691142 /llvm/lib/Target | |
| parent | 126115191271b732bdc01306e9ced72ff71d99bb (diff) | |
| download | bcm5719-llvm-e4d0e199bf178d41a160dabb6996ee98976d33ac.tar.gz bcm5719-llvm-e4d0e199bf178d41a160dabb6996ee98976d33ac.zip | |
[Hexagon] Fix store conversion from rr to io in optimize addressing modes
llvm-svn: 316170
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp index dba6cdf3276..c7e5e55a6a7 100644 --- a/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp +++ b/llvm/lib/Target/Hexagon/HexagonOptAddrMode.cpp @@ -361,7 +361,7 @@ bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, Changed = false; DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); - DEBUG(dbgs() << "[TO]: " << MIB << "\n"); + DEBUG(dbgs() << "[TO]: " << *MIB << "\n"); } else if (ImmOpNum == 2 && OldMI->getOperand(3).getImm() == 0) { short NewOpCode = HII->changeAddrMode_rr_io(*OldMI); assert(NewOpCode >= 0 && "Invalid New opcode\n"); @@ -372,7 +372,7 @@ bool HexagonOptAddrMode::changeLoad(MachineInstr *OldMI, MachineOperand ImmOp, OpStart = 4; Changed = true; DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); - DEBUG(dbgs() << "[TO]: " << MIB << "\n"); + DEBUG(dbgs() << "[TO]: " << *MIB << "\n"); } if (Changed) @@ -414,18 +414,17 @@ bool HexagonOptAddrMode::changeStore(MachineInstr *OldMI, MachineOperand ImmOp, } Changed = true; DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); - DEBUG(dbgs() << "[TO]: " << MIB << "\n"); + DEBUG(dbgs() << "[TO]: " << *MIB << "\n"); } else if (ImmOpNum == 1 && OldMI->getOperand(2).getImm() == 0) { short NewOpCode = HII->changeAddrMode_rr_io(*OldMI); assert(NewOpCode >= 0 && "Invalid New opcode\n"); MIB = BuildMI(*BB, InsertPt, OldMI->getDebugLoc(), HII->get(NewOpCode)); MIB.add(OldMI->getOperand(0)); MIB.add(ImmOp); - MIB.add(OldMI->getOperand(1)); - OpStart = 2; + OpStart = 3; Changed = true; DEBUG(dbgs() << "[Changing]: " << *OldMI << "\n"); - DEBUG(dbgs() << "[TO]: " << MIB << "\n"); + DEBUG(dbgs() << "[TO]: " << *MIB << "\n"); } if (Changed) for (unsigned i = OpStart; i < OpEnd; ++i) |
