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| author | Craig Topper <craig.topper@intel.com> | 2019-08-12 22:18:23 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-08-12 22:18:23 +0000 |
| commit | e07e593782b2d165ebfef3cac2999e74e42d20a6 (patch) | |
| tree | 894c409bac5e3685143a79276d9ae5de2eaa9954 /llvm/lib/Target | |
| parent | acc8079f8e6ff19fca4db46706d4b334a9094eba (diff) | |
| download | bcm5719-llvm-e07e593782b2d165ebfef3cac2999e74e42d20a6.tar.gz bcm5719-llvm-e07e593782b2d165ebfef3cac2999e74e42d20a6.zip | |
[X86] Allow combineTruncateWithSat to use pack instructions for i16->i8 without AVX512BW.
We need AVX512BW to be able to truncate an i16 vector. If we don't
have that we have to extend i16->i32, then trunc, i32->i8. But we
won't be able to remove the min/max if we do that. At least not
without more special handling.
llvm-svn: 368623
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index f49a425329b..90d56f56528 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -39024,7 +39024,8 @@ static SDValue combineTruncateWithSat(SDValue In, EVT VT, const SDLoc &DL, return DAG.getNode(X86ISD::VTRUNCUS, DL, VT, USatVal); } if (VT.isVector() && isPowerOf2_32(VT.getVectorNumElements()) && - !Subtarget.hasAVX512() && + !(Subtarget.hasAVX512() && InSVT == MVT::i32) && + !(Subtarget.hasBWI() && InSVT == MVT::i16) && (SVT == MVT::i8 || SVT == MVT::i16) && (InSVT == MVT::i16 || InSVT == MVT::i32)) { if (auto USatVal = detectSSatPattern(In, VT, true)) { |
