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authorDaniel Sanders <daniel_l_sanders@apple.com>2017-10-15 18:22:54 +0000
committerDaniel Sanders <daniel_l_sanders@apple.com>2017-10-15 18:22:54 +0000
commitdf39cbae2fdd290923cd672372eabb764e0665f2 (patch)
tree0a84b6b73d133086872f44c48e9caa6f409600e2 /llvm/lib/Target
parent4806f70060c8ab09acc83f1693815dfa1abdbd6b (diff)
downloadbcm5719-llvm-df39cbae2fdd290923cd672372eabb764e0665f2.tar.gz
bcm5719-llvm-df39cbae2fdd290923cd672372eabb764e0665f2.zip
Re-commit r315863: [globalisel][tablegen] Import ComplexPattern when used as an operator
Summary: It's possible for a ComplexPattern to be used as an operator in a match pattern. This is used by the load/store patterns in AArch64 to name the suboperands returned by ComplexPattern predicate so that they can be broken apart and referenced independently in the result pattern. This patch adds support for this in order to enable the import of load/store patterns. Depends on D37445 Hopefully fixed the ambiguous constructor that a large number of bots reported. Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar Reviewed By: qcolombet Subscribers: aemerson, javed.absar, igorb, llvm-commits, kristof.beyls Differential Revision: https://reviews.llvm.org/D37456 llvm-svn: 315869
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp13
1 files changed, 8 insertions, 5 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
index 88259ffdf00..ca93d1feaa6 100644
--- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp
@@ -1367,13 +1367,13 @@ AArch64InstructionSelector::selectArithImmed(MachineOperand &Root) const {
else if (Root.isReg()) {
MachineInstr *Def = MRI.getVRegDef(Root.getReg());
if (Def->getOpcode() != TargetOpcode::G_CONSTANT)
- return nullptr;
+ return None;
MachineOperand &Op1 = Def->getOperand(1);
if (!Op1.isCImm() || Op1.getCImm()->getBitWidth() > 64)
- return nullptr;
+ return None;
Immed = Op1.getCImm()->getZExtValue();
} else
- return nullptr;
+ return None;
unsigned ShiftAmt;
@@ -1383,10 +1383,13 @@ AArch64InstructionSelector::selectArithImmed(MachineOperand &Root) const {
ShiftAmt = 12;
Immed = Immed >> 12;
} else
- return nullptr;
+ return None;
unsigned ShVal = AArch64_AM::getShifterImm(AArch64_AM::LSL, ShiftAmt);
- return [=](MachineInstrBuilder &MIB) { MIB.addImm(Immed).addImm(ShVal); };
+ return {{
+ [=](MachineInstrBuilder &MIB) { MIB.addImm(Immed); },
+ [=](MachineInstrBuilder &MIB) { MIB.addImm(ShVal); },
+ }};
}
namespace llvm {
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