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authorAkira Hatanaka <ahatanak@gmail.com>2011-09-09 01:13:27 +0000
committerAkira Hatanaka <ahatanak@gmail.com>2011-09-09 01:13:27 +0000
commitdf1df7edf175cc4615807f1e6f63bd53900fb8ec (patch)
tree43b38fe84f3f234213c43b2373245e1bc92334d9 /llvm/lib/Target
parenteba0b403847542db9cb408256f2f8bfedfc66f5e (diff)
downloadbcm5719-llvm-df1df7edf175cc4615807f1e6f63bd53900fb8ec.tar.gz
bcm5719-llvm-df1df7edf175cc4615807f1e6f63bd53900fb8ec.zip
Change default target architecture from Mips1 to Mips32r1 in preparation for
removing support for Mips1 and Mips2. This change and the ones that follow have been discussed with and approved by Bruno. llvm-svn: 139344
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/Mips/Mips.td1
-rw-r--r--llvm/lib/Target/Mips/MipsSubtarget.cpp3
2 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/Mips/Mips.td b/llvm/lib/Target/Mips/Mips.td
index 433cd57f34e..4087c82d7e6 100644
--- a/llvm/lib/Target/Mips/Mips.td
+++ b/llvm/lib/Target/Mips/Mips.td
@@ -79,6 +79,7 @@ def : Proc<"r3000", [FeatureMips1]>;
def : Proc<"mips2", [FeatureMips2]>;
def : Proc<"r6000", [FeatureMips2]>;
+def : Proc<"mips32r1", [FeatureMips32]>;
def : Proc<"4ke", [FeatureMips32r2]>;
// Allegrex is a 32bit subset of r4000, both for integer and fp registers,
diff --git a/llvm/lib/Target/Mips/MipsSubtarget.cpp b/llvm/lib/Target/Mips/MipsSubtarget.cpp
index c273d0a2cd7..dd115fdecf9 100644
--- a/llvm/lib/Target/Mips/MipsSubtarget.cpp
+++ b/llvm/lib/Target/Mips/MipsSubtarget.cpp
@@ -31,8 +31,7 @@ MipsSubtarget::MipsSubtarget(const std::string &TT, const std::string &CPU,
{
std::string CPUName = CPU;
if (CPUName.empty())
- CPUName = "mips1";
- MipsArchVersion = Mips1;
+ CPUName = "mips32r1";
// Parse features string.
ParseSubtargetFeatures(CPUName, FS);
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