diff options
| author | Evan Cheng <evan.cheng@apple.com> | 2008-05-05 22:12:23 +0000 | 
|---|---|---|
| committer | Evan Cheng <evan.cheng@apple.com> | 2008-05-05 22:12:23 +0000 | 
| commit | dbfcce37fe46c153399a68f198ffb31872f9b8ce (patch) | |
| tree | 2e03134e988a1385baf0448ba0b746cc639920ab /llvm/lib/Target | |
| parent | 00daccdd2aebb72cf2dcad147545c10ff6939b63 (diff) | |
| download | bcm5719-llvm-dbfcce37fe46c153399a68f198ffb31872f9b8ce.tar.gz bcm5719-llvm-dbfcce37fe46c153399a68f198ffb31872f9b8ce.zip | |
Code clean up. No functionality change.
llvm-svn: 50675
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 41 | 
1 files changed, 21 insertions, 20 deletions
| diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 2df8af5e505..b0a7c786968 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -6214,35 +6214,36 @@ static SDOperand PerformShuffleCombine(SDNode *N, SelectionDAG &DAG,    MVT::ValueType VT = N->getValueType(0);    MVT::ValueType EVT = MVT::getVectorElementType(VT);    SDOperand PermMask = N->getOperand(2); -  int NumElems = (int)PermMask.getNumOperands(); +  unsigned NumElems = PermMask.getNumOperands();    SDNode *Base = NULL; -  for (int i = 0; i < NumElems; ++i) { -    SDOperand Idx = PermMask.getOperand(i); -    if (Idx.getOpcode() == ISD::UNDEF) { -      if (!Base) return SDOperand(); -    } else { -      SDOperand Arg = -        getShuffleScalarElt(N, cast<ConstantSDNode>(Idx)->getValue(), DAG); -      if (!Arg.Val || !ISD::isNON_EXTLoad(Arg.Val)) -        return SDOperand(); +  for (unsigned i = 0; i < NumElems; ++i) { +    SDOperand Elt = PermMask.getOperand(i); +    if (Elt.getOpcode() == ISD::UNDEF) {        if (!Base) -        Base = Arg.Val; -      else if (!isConsecutiveLoad(Arg.Val, Base, -                                  i, MVT::getSizeInBits(EVT)/8,MFI))          return SDOperand(); +      continue; +    } + +    unsigned Idx = cast<ConstantSDNode>(Elt)->getValue(); +    SDOperand Arg = getShuffleScalarElt(N, Idx, DAG); +    if (!Arg.Val || !ISD::isNON_EXTLoad(Arg.Val)) +      return SDOperand(); +    if (!Base) { +      Base = Arg.Val; +      continue;      } + +    if (!isConsecutiveLoad(Arg.Val, Base, i, MVT::getSizeInBits(EVT)/8,MFI)) +      return SDOperand();    } -  bool isAlign16 = isBaseAlignment16(Base->getOperand(1).Val, MFI, Subtarget);    LoadSDNode *LD = cast<LoadSDNode>(Base); -  if (isAlign16) { +  if (isBaseAlignment16(Base->getOperand(1).Val, MFI, Subtarget))      return DAG.getLoad(VT, LD->getChain(), LD->getBasePtr(), LD->getSrcValue(),                         LD->getSrcValueOffset(), LD->isVolatile()); -  } else { -    return DAG.getLoad(VT, LD->getChain(), LD->getBasePtr(), LD->getSrcValue(), -                       LD->getSrcValueOffset(), LD->isVolatile(), -                       LD->getAlignment()); -  } +  return DAG.getLoad(VT, LD->getChain(), LD->getBasePtr(), LD->getSrcValue(), +                     LD->getSrcValueOffset(), LD->isVolatile(), +                     LD->getAlignment());  }  /// PerformSELECTCombine - Do target-specific dag combines on SELECT nodes. | 

