diff options
author | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2016-02-22 21:30:15 +0000 |
---|---|---|
committer | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2016-02-22 21:30:15 +0000 |
commit | d84f60065366d99c3aca4c8f917a35ab9ce4e7f5 (patch) | |
tree | 5d1e10b9568670bb98979a943db23a092e702448 /llvm/lib/Target | |
parent | fb1533b3263e710f6eaa36344c6e15f6a9d8a6a2 (diff) | |
download | bcm5719-llvm-d84f60065366d99c3aca4c8f917a35ab9ce4e7f5.tar.gz bcm5719-llvm-d84f60065366d99c3aca4c8f917a35ab9ce4e7f5.zip |
CodeGen: Bring back MachineBasicBlock::iterator::getInstrIterator()...
This is a little embarrassing.
When I reverted r261504 (getIterator() => getInstrIterator()) in
r261567, I did a `git grep` to see if there were new calls to
`getInstrIterator()` that I needed to migrate. There were 10-20 hits,
and I blindly did a `sed ...` before calling `ninja check`.
However, these were `MachineInstrBundleIterator::getInstrIterator()`,
which predated r261567. Perhaps coincidentally, these had an identical
name and return type.
This commit undoes my careless sed and restores
`MachineBasicBlock::iterator::getInstrIterator()`.
llvm-svn: 261577
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/AMDGPU/R600Packetizer.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp | 3 | ||||
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 4 |
7 files changed, 9 insertions, 8 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp b/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp index b17b002f3b5..bb4bda25470 100644 --- a/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp +++ b/llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp @@ -397,7 +397,7 @@ private: std::vector<int64_t> Literals; if (I->isBundle()) { MachineInstr *DeleteMI = I; - MachineBasicBlock::instr_iterator BI = I.getIterator(); + MachineBasicBlock::instr_iterator BI = I.getInstrIterator(); while (++BI != E && BI->isBundledWithPred()) { BI->unbundleFromPred(); for (unsigned i = 0, e = BI->getNumOperands(); i != e; ++i) { diff --git a/llvm/lib/Target/AMDGPU/R600Packetizer.cpp b/llvm/lib/Target/AMDGPU/R600Packetizer.cpp index 63fba1fd061..21269613a30 100644 --- a/llvm/lib/Target/AMDGPU/R600Packetizer.cpp +++ b/llvm/lib/Target/AMDGPU/R600Packetizer.cpp @@ -75,7 +75,7 @@ private: I--; if (!TII->isALUInstr(I->getOpcode()) && !I->isBundle()) return Result; - MachineBasicBlock::instr_iterator BI = I.getIterator(); + MachineBasicBlock::instr_iterator BI = I.getInstrIterator(); if (I->isBundle()) BI++; int LastDstChan = -1; diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index 689a43e7df4..49f32885266 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -3410,7 +3410,7 @@ static const MachineInstr *getBundledDefMI(const TargetRegisterInfo *TRI, Dist = 0; MachineBasicBlock::const_iterator I = MI; ++I; - MachineBasicBlock::const_instr_iterator II = std::prev(I.getIterator()); + MachineBasicBlock::const_instr_iterator II = std::prev(I.getInstrIterator()); assert(II->isInsideBundle() && "Empty bundle?"); int Idx = -1; diff --git a/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp b/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp index c28ebe9cb26..bf0498dfda6 100644 --- a/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp +++ b/llvm/lib/Target/ARM/Thumb2ITBlockPass.cpp @@ -256,7 +256,8 @@ bool Thumb2ITBlockPass::InsertITInstructions(MachineBasicBlock &MBB) { LastITMI->findRegisterUseOperand(ARM::ITSTATE)->setIsKill(); // Finalize the bundle. - finalizeBundle(MBB, InsertPos.getIterator(), ++LastITMI->getIterator()); + finalizeBundle(MBB, InsertPos.getInstrIterator(), + ++LastITMI->getIterator()); Modified = true; ++NumITs; diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp index a1e58e95371..5294266d35f 100644 --- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp +++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp @@ -582,7 +582,7 @@ namespace { if (!It->isBundle()) return It->getOpcode() == Hexagon::S2_allocframe; auto End = It->getParent()->instr_end(); - MachineBasicBlock::const_instr_iterator I = It.getIterator(); + MachineBasicBlock::const_instr_iterator I = It.getInstrIterator(); while (++I != End && I->isBundled()) if (I->getOpcode() == Hexagon::S2_allocframe) return true; diff --git a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp index 9a92f996069..32088f31836 100644 --- a/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp +++ b/llvm/lib/Target/Hexagon/HexagonInstrInfo.cpp @@ -4071,7 +4071,7 @@ unsigned HexagonInstrInfo::nonDbgBBSize(const MachineBasicBlock *BB) const { unsigned HexagonInstrInfo::nonDbgBundleSize( MachineBasicBlock::const_iterator BundleHead) const { assert(BundleHead->isBundle() && "Not a bundle header"); - auto MII = BundleHead.getIterator(); + auto MII = BundleHead.getInstrIterator(); // Skip the bundle header. return nonDbgMICount(++MII, getBundleEnd(BundleHead)); } diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp index 1ce385ee68e..81850548bb6 100644 --- a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp +++ b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp @@ -126,9 +126,9 @@ static MachineBasicBlock::iterator moveInstrOut(MachineInstr *MI, MachineBasicBlock::iterator BundleIt, bool Before) { MachineBasicBlock::instr_iterator InsertPt; if (Before) - InsertPt = BundleIt.getIterator(); + InsertPt = BundleIt.getInstrIterator(); else - InsertPt = std::next(BundleIt).getIterator(); + InsertPt = std::next(BundleIt).getInstrIterator(); MachineBasicBlock &B = *MI->getParent(); // The instruction should at least be bundled with the preceding instruction |