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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-12-21 15:15:38 +0000 | 
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-12-21 15:15:38 +0000 | 
| commit | d800ee48615600a93c46bc77a1f8434cca1fb486 (patch) | |
| tree | c3579aa5d0ad0b1447ccc4395a6f751b911b7280 /llvm/lib/Target | |
| parent | 148957f336d70ecbb061b432e5f525af743d92d9 (diff) | |
| download | bcm5719-llvm-d800ee48615600a93c46bc77a1f8434cca1fb486.tar.gz bcm5719-llvm-d800ee48615600a93c46bc77a1f8434cca1fb486.zip | |
[ARM] Always use the version of computeKnownBits that returns a value. NFCI.
Continues the work started by @bogner in rL340594 to remove uses of the KnownBits output paramater version.
llvm-svn: 349909
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 13 | 
1 files changed, 5 insertions, 8 deletions
| diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index 22f8f7865fb..02272f7ba18 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -12576,8 +12576,7 @@ SDValue ARMTargetLowering::PerformCMOVToBFICombine(SDNode *CMOV, SelectionDAG &D    // Lastly, can we determine that the bits defined by OrCI    // are zero in Y? -  KnownBits Known; -  DAG.computeKnownBits(Y, Known); +  KnownBits Known = DAG.computeKnownBits(Y);    if ((OrCI & Known.Zero) != OrCI)      return SDValue(); @@ -12807,8 +12806,7 @@ ARMTargetLowering::PerformCMOVCombine(SDNode *N, SelectionDAG &DAG) const {    }    if (Res.getNode()) { -    KnownBits Known; -    DAG.computeKnownBits(SDValue(N,0), Known); +    KnownBits Known = DAG.computeKnownBits(SDValue(N,0));      // Capture demanded bits information that would be otherwise lost.      if (Known.Zero == 0xfffffffe)        Res = DAG.getNode(ISD::AssertZext, dl, MVT::i32, Res, @@ -13599,12 +13597,11 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,      break;    case ARMISD::CMOV: {      // Bits are known zero/one if known on the LHS and RHS. -    DAG.computeKnownBits(Op.getOperand(0), Known, Depth+1); +    Known = DAG.computeKnownBits(Op.getOperand(0), Depth+1);      if (Known.isUnknown())        return; -    KnownBits KnownRHS; -    DAG.computeKnownBits(Op.getOperand(1), KnownRHS, Depth+1); +    KnownBits KnownRHS = DAG.computeKnownBits(Op.getOperand(1), Depth+1);      Known.Zero &= KnownRHS.Zero;      Known.One  &= KnownRHS.One;      return; @@ -13626,7 +13623,7 @@ void ARMTargetLowering::computeKnownBitsForTargetNode(const SDValue Op,    case ARMISD::BFI: {      // Conservatively, we can recurse down the first operand      // and just mask out all affected bits. -    DAG.computeKnownBits(Op.getOperand(0), Known, Depth + 1); +    Known = DAG.computeKnownBits(Op.getOperand(0), Depth + 1);      // The operand to BFI is already a mask suitable for removing the bits it      // sets. | 

