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| author | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2016-11-17 04:28:37 +0000 |
|---|---|---|
| committer | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2016-11-17 04:28:37 +0000 |
| commit | d709efb0da64fa286362cedabccdb316a2461d24 (patch) | |
| tree | cf7bbd54d279ac3df217d12860729f9b2abae0a4 /llvm/lib/Target | |
| parent | 729ac793a28b50c0025d499d84fd7501a3e35c71 (diff) | |
| download | bcm5719-llvm-d709efb0da64fa286362cedabccdb316a2461d24.tar.gz bcm5719-llvm-d709efb0da64fa286362cedabccdb316a2461d24.zip | |
[AMDGPU] Custom lower f16 = fp_round f64
llvm-svn: 287203
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 20 | ||||
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.h | 3 |
2 files changed, 23 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index b72415b9e90..79953b7c450 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -285,6 +285,7 @@ SITargetLowering::SITargetLowering(const TargetMachine &TM, AddPromotedToType(ISD::STORE, MVT::f16, MVT::i16); // F16 - VOP1 Actions. + setOperationAction(ISD::FP_ROUND, MVT::f16, Custom); setOperationAction(ISD::FCOS, MVT::f16, Promote); setOperationAction(ISD::FSIN, MVT::f16, Promote); setOperationAction(ISD::FP_TO_SINT, MVT::f16, Promote); @@ -1832,6 +1833,8 @@ SDValue SITargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const { case ISD::ConstantFP: return lowerConstantFP(Op, DAG); + case ISD::FP_ROUND: + return lowerFP_ROUND(Op, DAG); } return SDValue(); } @@ -2043,6 +2046,23 @@ SDValue SITargetLowering::lowerConstantFP(SDValue Op, SelectionDAG &DAG) const { return SDValue(); } +SDValue SITargetLowering::lowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const { + EVT DstVT = Op.getValueType(); + EVT SrcVT = Op.getOperand(0).getValueType(); + + assert(DstVT == MVT::f16 && + "Do not know how to custom lower FP_ROUND for non-f16 type"); + + if (SrcVT != MVT::f64) + return Op; + + SDLoc DL(Op); + SDValue Src = Op.getOperand(0); + SDValue FpToFp16 = DAG.getNode(ISD::FP_TO_FP16, DL, MVT::i32, Src); + SDValue Trunc = DAG.getNode(ISD::TRUNCATE, DL, MVT::i16, FpToFp16); + return DAG.getNode(ISD::BITCAST, DL, MVT::f16, Trunc);; +} + SDValue SITargetLowering::getSegmentAperture(unsigned AS, SelectionDAG &DAG) const { SDLoc SL; diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.h b/llvm/lib/Target/AMDGPU/SIISelLowering.h index 2cbfe11a76b..2e14f499a85 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.h +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.h @@ -56,6 +56,9 @@ class SITargetLowering final : public AMDGPUTargetLowering { /// \brief Custom lowering for ISD::ConstantFP. SDValue lowerConstantFP(SDValue Op, SelectionDAG &DAG) const; + /// \brief Custom lowering for ISD::FP_ROUND for MVT::f16. + SDValue lowerFP_ROUND(SDValue Op, SelectionDAG &DAG) const; + SDValue getSegmentAperture(unsigned AS, SelectionDAG &DAG) const; SDValue lowerADDRSPACECAST(SDValue Op, SelectionDAG &DAG) const; SDValue lowerTRAP(SDValue Op, SelectionDAG &DAG) const; |

