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author | Craig Topper <craig.topper@gmail.com> | 2016-03-01 05:42:16 +0000 |
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committer | Craig Topper <craig.topper@gmail.com> | 2016-03-01 05:42:16 +0000 |
commit | d40a55064f00b70744c85cc00585a839c8e38f31 (patch) | |
tree | 1f83b2c4e92b40dd3b943c26bf217e452e9eb8fa /llvm/lib/Target | |
parent | cc9e92eb417d9efd3a7bdcc5d23b0fa72ec97d6a (diff) | |
download | bcm5719-llvm-d40a55064f00b70744c85cc00585a839c8e38f31.tar.gz bcm5719-llvm-d40a55064f00b70744c85cc00585a839c8e38f31.zip |
[X86] Combine some initialization code with variable declaration and comments. NFC
llvm-svn: 262301
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp | 69 |
1 files changed, 28 insertions, 41 deletions
diff --git a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp index 1a0dbdf0c14..dd4c5e6de3b 100644 --- a/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp +++ b/llvm/lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp @@ -627,7 +627,7 @@ void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, // VEX_W: opcode specific (use like REX.W, or used for // opcode extension, or ignored, depending on the opcode byte) - unsigned char VEX_W = 0; + unsigned char VEX_W = (TSFlags & X86II::VEX_W) ? 1 : 0; // VEX_5M (VEX m-mmmmm field): // @@ -639,20 +639,31 @@ void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, // 0b01000: XOP map select - 08h instructions with imm byte // 0b01001: XOP map select - 09h instructions with no imm byte // 0b01010: XOP map select - 0Ah instructions with imm dword - unsigned char VEX_5M = 0; + unsigned char VEX_5M; + switch (TSFlags & X86II::OpMapMask) { + default: llvm_unreachable("Invalid prefix!"); + case X86II::TB: VEX_5M = 0x1; break; // 0F + case X86II::T8: VEX_5M = 0x2; break; // 0F 38 + case X86II::TA: VEX_5M = 0x3; break; // 0F 3A + case X86II::XOP8: VEX_5M = 0x8; break; + case X86II::XOP9: VEX_5M = 0x9; break; + case X86II::XOPA: VEX_5M = 0xA; break; + } // VEX_4V (VEX vvvv field): a register specifier // (in 1's complement form) or 1111 if unused. unsigned char VEX_4V = 0xf; unsigned char EVEX_V2 = 0x1; - // VEX_L (Vector Length): + // EVEX_L2/VEX_L (Vector Length): // - // 0: scalar or 128-bit vector - // 1: 256-bit vector + // L2 L + // 0 0: scalar or 128-bit vector + // 0 1: 256-bit vector + // 1 0: 512-bit vector // - unsigned char VEX_L = 0; - unsigned char EVEX_L2 = 0; + unsigned char VEX_L = (TSFlags & X86II::VEX_L) ? 1 : 0; + unsigned char EVEX_L2 = (TSFlags & X86II::EVEX_L2) ? 1 : 0; // VEX_PP: opcode extension providing equivalent // functionality of a SIMD prefix @@ -662,16 +673,23 @@ void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, // 0b10: F3 // 0b11: F2 // - unsigned char VEX_PP = 0; + unsigned char VEX_PP; + switch (TSFlags & X86II::OpPrefixMask) { + default: llvm_unreachable("Invalid op prefix!"); + case X86II::PS: VEX_PP = 0x0; break; // none + case X86II::PD: VEX_PP = 0x1; break; // 66 + case X86II::XS: VEX_PP = 0x2; break; // F3 + case X86II::XD: VEX_PP = 0x3; break; // F2 + } // EVEX_U unsigned char EVEX_U = 1; // Always '1' so far // EVEX_z - unsigned char EVEX_z = 0; + unsigned char EVEX_z = (HasEVEX_K && (TSFlags & X86II::EVEX_Z)) ? 1 : 0; // EVEX_b - unsigned char EVEX_b = 0; + unsigned char EVEX_b = (TSFlags & X86II::EVEX_B) ? 1 : 0; // EVEX_rc unsigned char EVEX_rc = 0; @@ -681,37 +699,6 @@ void X86MCCodeEmitter::EmitVEXOpcodePrefix(uint64_t TSFlags, unsigned &CurByte, bool EncodeRC = false; - if (TSFlags & X86II::VEX_W) - VEX_W = 1; - - if (TSFlags & X86II::VEX_L) - VEX_L = 1; - if (TSFlags & X86II::EVEX_L2) - EVEX_L2 = 1; - - if (HasEVEX_K && (TSFlags & X86II::EVEX_Z)) - EVEX_z = 1; - - if ((TSFlags & X86II::EVEX_B)) - EVEX_b = 1; - - switch (TSFlags & X86II::OpPrefixMask) { - default: break; // VEX_PP already correct - case X86II::PD: VEX_PP = 0x1; break; // 66 - case X86II::XS: VEX_PP = 0x2; break; // F3 - case X86II::XD: VEX_PP = 0x3; break; // F2 - } - - switch (TSFlags & X86II::OpMapMask) { - default: llvm_unreachable("Invalid prefix!"); - case X86II::TB: VEX_5M = 0x1; break; // 0F - case X86II::T8: VEX_5M = 0x2; break; // 0F 38 - case X86II::TA: VEX_5M = 0x3; break; // 0F 3A - case X86II::XOP8: VEX_5M = 0x8; break; - case X86II::XOP9: VEX_5M = 0x9; break; - case X86II::XOPA: VEX_5M = 0xA; break; - } - // Classify VEX_B, VEX_4V, VEX_R, VEX_X unsigned NumOps = Desc.getNumOperands(); unsigned CurOp = X86II::getOperandBias(Desc); |