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| author | Duraid Madina <duraid@octopus.com.au> | 2005-11-04 10:01:10 +0000 |
|---|---|---|
| committer | Duraid Madina <duraid@octopus.com.au> | 2005-11-04 10:01:10 +0000 |
| commit | d3260128af60e9d0df90610550dfa5985a6f2e0e (patch) | |
| tree | 675fa6aac7f8ab175f49be14b4205f6e658a51a6 /llvm/lib/Target | |
| parent | fc1d1b249921fba272d8c31392419db1ac481f27 (diff) | |
| download | bcm5719-llvm-d3260128af60e9d0df90610550dfa5985a6f2e0e.tar.gz bcm5719-llvm-d3260128af60e9d0df90610550dfa5985a6f2e0e.zip | |
kill redundant SP/GP/RP save/restores across calls
llvm-svn: 24183
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/IA64/IA64ISelLowering.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/IA64/IA64ISelLowering.cpp b/llvm/lib/Target/IA64/IA64ISelLowering.cpp index 37f15eeb62c..d757496f1de 100644 --- a/llvm/lib/Target/IA64/IA64ISelLowering.cpp +++ b/llvm/lib/Target/IA64/IA64ISelLowering.cpp @@ -192,20 +192,21 @@ IA64TargetLowering::LowerArguments(Function &F, SelectionDAG &DAG) { VirtGPR = MF.getSSARegMap()->createVirtualRegister(getRegClassFor(MVT::i64)); BuildMI(&BB, IA64::PSEUDO_ALLOC, 0, VirtGPR); // we create a PSEUDO_ALLOC (pseudo)instruction for now - +/* BuildMI(&BB, IA64::IDEF, 0, IA64::r1); // hmm: BuildMI(&BB, IA64::IDEF, 0, IA64::r12); BuildMI(&BB, IA64::IDEF, 0, IA64::rp); // ..hmm. - + BuildMI(&BB, IA64::MOV, 1, GP).addReg(IA64::r1); // hmm: BuildMI(&BB, IA64::MOV, 1, SP).addReg(IA64::r12); BuildMI(&BB, IA64::MOV, 1, RP).addReg(IA64::rp); // ..hmm. +*/ unsigned tempOffset=0; |
