diff options
| author | Daniel Dunbar <daniel@zuster.org> | 2010-02-02 21:44:10 +0000 |
|---|---|---|
| committer | Daniel Dunbar <daniel@zuster.org> | 2010-02-02 21:44:10 +0000 |
| commit | d28d6db7355774a1a8994438dbfdde3351f708d7 (patch) | |
| tree | 5e28694d9778dd1b3299131eab467ebeef84b749 /llvm/lib/Target | |
| parent | 255a8c8b13b1ed83f1a45e1ca37927dfc1752390 (diff) | |
| download | bcm5719-llvm-d28d6db7355774a1a8994438dbfdde3351f708d7.tar.gz bcm5719-llvm-d28d6db7355774a1a8994438dbfdde3351f708d7.zip | |
MCCodeEmitter/X86: Handle tied registers better when converting MCInst ->
MCMachineInstr. This also fixes handling of tied registers for MRMSrcMem
instructions.
llvm-svn: 95136
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86CodeEmitter.cpp | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp index e2c31395b20..561558ba3e7 100644 --- a/llvm/lib/Target/X86/X86CodeEmitter.cpp +++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp @@ -1002,10 +1002,10 @@ public: unsigned Opcode = MI.getOpcode(); unsigned NumOps = MI.getNumOperands(); unsigned CurOp = 0; - if (NumOps > 1 && Desc.getOperandConstraint(1, TOI::TIED_TO) != -1) { - Instr->addOperand(MachineOperand::CreateReg(0, false)); - ++CurOp; - } else if (NumOps > 2 && + bool AddTied = false; + if (NumOps > 1 && Desc.getOperandConstraint(1, TOI::TIED_TO) != -1) + AddTied = true; + else if (NumOps > 2 && Desc.getOperandConstraint(NumOps-1, TOI::TIED_TO)== 0) // Skip the last source operand that is tied_to the dest reg. e.g. LXADD32 --NumOps; @@ -1016,7 +1016,9 @@ public: case X86II::MRMSrcReg: // Matching doesn't fill this in completely, we have to choose operand 0 // for a tied register. - OK &= AddRegToInstr(MI, Instr, 0); CurOp++; + OK &= AddRegToInstr(MI, Instr, CurOp++); + if (AddTied) + OK &= AddRegToInstr(MI, Instr, CurOp++ - 1); OK &= AddRegToInstr(MI, Instr, CurOp++); if (CurOp < NumOps) OK &= AddImmToInstr(MI, Instr, CurOp); @@ -1035,7 +1037,11 @@ public: break; case X86II::AddRegFrm: + // Matching doesn't fill this in completely, we have to choose operand 0 + // for a tied register. OK &= AddRegToInstr(MI, Instr, CurOp++); + if (AddTied) + OK &= AddRegToInstr(MI, Instr, CurOp++ - 1); if (CurOp < NumOps) OK &= AddImmToInstr(MI, Instr, CurOp); break; @@ -1046,7 +1052,9 @@ public: case X86II::MRM6r: case X86II::MRM7r: // Matching doesn't fill this in completely, we have to choose operand 0 // for a tied register. - OK &= AddRegToInstr(MI, Instr, 0); CurOp++; + OK &= AddRegToInstr(MI, Instr, CurOp++); + if (AddTied) + OK &= AddRegToInstr(MI, Instr, CurOp++ - 1); if (CurOp < NumOps) OK &= AddImmToInstr(MI, Instr, CurOp); break; @@ -1061,7 +1069,11 @@ public: break; case X86II::MRMSrcMem: + // Matching doesn't fill this in completely, we have to choose operand 0 + // for a tied register. OK &= AddRegToInstr(MI, Instr, CurOp++); + if (AddTied) + OK &= AddRegToInstr(MI, Instr, CurOp++ - 1); if (Opcode == X86::LEA64r || Opcode == X86::LEA64_32r || Opcode == X86::LEA16r || Opcode == X86::LEA32r) OK &= AddLMemToInstr(MI, Instr, CurOp); |
