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| author | Tom Stellard <thomas.stellard@amd.com> | 2016-11-15 21:25:56 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2016-11-15 21:25:56 +0000 |
| commit | d23de360dbbae33a5d6ba1519fe3156fa6f4cd85 (patch) | |
| tree | 6a8851805aa7f1495d533f10fa7a4a49e652741b /llvm/lib/Target | |
| parent | c3dcf99441322c37eb3a7a013b92554622beb7a6 (diff) | |
| download | bcm5719-llvm-d23de360dbbae33a5d6ba1519fe3156fa6f4cd85.tar.gz bcm5719-llvm-d23de360dbbae33a5d6ba1519fe3156fa6f4cd85.zip | |
AMDGPU/SI: Fix pattern for i16 = sign_extend i1
Reviewers: arsenm
Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye
Differential Revision: https://reviews.llvm.org/D26670
llvm-svn: 287035
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/VOP2Instructions.td | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td index 8e86aa0796e..b87f3be2139 100644 --- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td @@ -433,9 +433,13 @@ defm : Bits_OpsRev_i16_Pats<srl, V_LSHRREV_B16_e32>; defm : Bits_OpsRev_i16_Pats<sra, V_ASHRREV_B16_e32>; def : ZExt_i16_i1_Pat<zext>; -def : ZExt_i16_i1_Pat<sext>; def : ZExt_i16_i1_Pat<anyext>; +def : Pat < + (i16 (sext i1:$src)), + (V_CNDMASK_B32_e64 (i32 0), (i32 -1), $src) +>; + } // End Predicates = [isVI] //===----------------------------------------------------------------------===// |
