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authorTim Shen <timshen91@gmail.com>2017-06-17 01:25:34 +0000
committerTim Shen <timshen91@gmail.com>2017-06-17 01:25:34 +0000
commitd123c194e014cb9ce3f42e8b4de93f2b6eb0a4d5 (patch)
tree6a888a6026fc7d2852423b9523e51ac90cebbc96 /llvm/lib/Target
parent9382c5560b35540e19f34a61121202126b319c4b (diff)
downloadbcm5719-llvm-d123c194e014cb9ce3f42e8b4de93f2b6eb0a4d5.tar.gz
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[PPC] Remove isBarrier from CFENCE8's definition.
Summary: This is my misunderstanding on isBarrier. It's not for memory barriers, but for other control flow purposes. lwsync doesn't have it either. This fixes a simple crash with -verify-machineinstrs like below: define void @Foo() { entry: %tmp = load atomic i64, i64* undef acquire, align 8 unreachable } I deliberately don't want to check in the test, since there is little chance to regress on such a mistake. Such a test adds noise to the code base. I plan to check in first, since it fixes a crash, and the fix is obvious. Reviewers: kbarton, echristo Subscribers: sanjoy, nemanjai, hiraditya, llvm-commits Differential Revision: https://reviews.llvm.org/D34314 llvm-svn: 305624
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstr64Bit.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
index 70536a6039b..235640a9018 100644
--- a/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
+++ b/llvm/lib/Target/PowerPC/PPCInstr64Bit.td
@@ -994,7 +994,7 @@ def LDgotTprelL: Pseudo<(outs g8rc:$rD), (ins s16imm64:$disp, g8rc_nox0:$reg),
(PPCldGotTprelL tglobaltlsaddr:$disp, i64:$reg))]>,
isPPC64;
-let isBarrier = 1, isPseudo = 1, Defs = [CR7], Itinerary = IIC_LdStSync in
+let isPseudo = 1, Defs = [CR7], Itinerary = IIC_LdStSync in
def CFENCE8 : Pseudo<(outs), (ins g8rc:$cr), "#CFENCE8", []>;
def : Pat<(PPCaddTls i64:$in, tglobaltlsaddr:$g),
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