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authorRafael Auler <rafaelauler@fb.com>2018-03-27 16:58:01 +0000
committerRafael Auler <rafaelauler@fb.com>2018-03-27 16:58:01 +0000
commitd058b882be1d5e540c8b5f9b5273913dd99ffc15 (patch)
tree013af7f23fb2b9a1ab5e6fae9c36723b77ed1f51 /llvm/lib/Target
parent98014e433fe10d5a72ee1f5fbb29363ceb1533eb (diff)
downloadbcm5719-llvm-d058b882be1d5e540c8b5f9b5273913dd99ffc15.tar.gz
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[AArch64] Decorate AArch64 instrs with OPERAND_PCREL
Summary: This is a canonical way to teach objdump to print the target symbols for branches when disassembling AArch64 code. Reviewers: evandro, t.p.northover, espindola Reviewed By: t.p.northover Differential Revision: https://reviews.llvm.org/D44851 llvm-svn: 328638
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/AArch64/AArch64InstrFormats.td5
-rw-r--r--llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp23
2 files changed, 27 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrFormats.td b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
index 8839b610903..e1dcd1b7465 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrFormats.td
+++ b/llvm/lib/Target/AArch64/AArch64InstrFormats.td
@@ -1244,6 +1244,7 @@ def am_brcond : Operand<OtherVT> {
let DecoderMethod = "DecodePCRelLabel19";
let PrintMethod = "printAlignedLabel";
let ParserMatchClass = PCRelLabel19Operand;
+ let OperandType = "OPERAND_PCREL";
}
class BranchCond : I<(outs), (ins ccode:$cond, am_brcond:$target),
@@ -1299,6 +1300,7 @@ def am_tbrcond : Operand<OtherVT> {
let EncoderMethod = "getTestBranchTargetOpValue";
let PrintMethod = "printAlignedLabel";
let ParserMatchClass = BranchTarget14Operand;
+ let OperandType = "OPERAND_PCREL";
}
// AsmOperand classes to emit (or not) special diagnostics
@@ -1375,11 +1377,13 @@ def am_b_target : Operand<OtherVT> {
let EncoderMethod = "getBranchTargetOpValue";
let PrintMethod = "printAlignedLabel";
let ParserMatchClass = BranchTarget26Operand;
+ let OperandType = "OPERAND_PCREL";
}
def am_bl_target : Operand<i64> {
let EncoderMethod = "getBranchTargetOpValue";
let PrintMethod = "printAlignedLabel";
let ParserMatchClass = BranchTarget26Operand;
+ let OperandType = "OPERAND_PCREL";
}
class BImm<bit op, dag iops, string asm, list<dag> pattern>
@@ -2667,6 +2671,7 @@ def am_ldrlit : Operand<iPTR> {
let DecoderMethod = "DecodePCRelLabel19";
let PrintMethod = "printAlignedLabel";
let ParserMatchClass = PCRelLabel19Operand;
+ let OperandType = "OPERAND_PCREL";
}
let mayLoad = 1, mayStore = 0, hasSideEffects = 0 in
diff --git a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
index c3458d625b8..37257d8328c 100644
--- a/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
+++ b/llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
@@ -131,8 +131,29 @@ createWinCOFFStreamer(MCContext &Ctx, std::unique_ptr<MCAsmBackend> &&TAB,
IncrementalLinkerCompatible);
}
+namespace {
+
+class AArch64MCInstrAnalysis : public MCInstrAnalysis {
+public:
+ AArch64MCInstrAnalysis(const MCInstrInfo *Info) : MCInstrAnalysis(Info) {}
+
+ bool evaluateBranch(const MCInst &Inst, uint64_t Addr, uint64_t Size,
+ uint64_t &Target) const override {
+ if (Inst.getNumOperands() == 0 ||
+ Info->get(Inst.getOpcode()).OpInfo[0].OperandType !=
+ MCOI::OPERAND_PCREL)
+ return false;
+
+ int64_t Imm = Inst.getOperand(0).getImm() * 4;
+ Target = Addr + Imm;
+ return true;
+ }
+};
+
+} // end anonymous namespace
+
static MCInstrAnalysis *createAArch64InstrAnalysis(const MCInstrInfo *Info) {
- return new MCInstrAnalysis(Info);
+ return new AArch64MCInstrAnalysis(Info);
}
// Force static initialization.
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