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| author | Craig Topper <craig.topper@gmail.com> | 2012-04-07 22:32:29 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2012-04-07 22:32:29 +0000 |
| commit | d024cef233a8f542d2fef4dfb82bd3a97a3a6b83 (patch) | |
| tree | 26b3a9d0c0abe43a4534230b9ee3f624a461a58a /llvm/lib/Target | |
| parent | 571d7bde3ca1325cf05c3a73822025bae94a2640 (diff) | |
| download | bcm5719-llvm-d024cef233a8f542d2fef4dfb82bd3a97a3a6b83.tar.gz bcm5719-llvm-d024cef233a8f542d2fef4dfb82bd3a97a3a6b83.zip | |
Turn avx2 vinserti128 intrinsic calls into INSERT_SUBVECTOR DAG nodes and remove patterns for selecting the intrinsic. Similar was already done for avx1.
llvm-svn: 154272
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSSE.td | 9 |
1 files changed, 4 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td index 7ccf93e5290..f4e44184915 100644 --- a/llvm/lib/Target/X86/X86InstrSSE.td +++ b/llvm/lib/Target/X86/X86InstrSSE.td @@ -7783,18 +7783,17 @@ def : Pat<(v8i32 (X86VPerm2x128 VR256:$src1, (bc_v8i32 (memopv4i64 addr:$src2)), //===----------------------------------------------------------------------===// // VINSERTI128 - Insert packed integer values // +let neverHasSideEffects = 1 in { def VINSERTI128rr : AVX2AIi8<0x38, MRMSrcReg, (outs VR256:$dst), (ins VR256:$src1, VR128:$src2, i8imm:$src3), "vinserti128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}", - [(set VR256:$dst, - (int_x86_avx2_vinserti128 VR256:$src1, VR128:$src2, imm:$src3))]>, + []>, VEX_4V; def VINSERTI128rm : AVX2AIi8<0x38, MRMSrcMem, (outs VR256:$dst), (ins VR256:$src1, i128mem:$src2, i8imm:$src3), "vinserti128\t{$src3, $src2, $src1, $dst|$dst, $src1, $src2, $src3}", - [(set VR256:$dst, - (int_x86_avx2_vinserti128 VR256:$src1, (memopv2i64 addr:$src2), - imm:$src3))]>, VEX_4V; + []>, VEX_4V; +} let Predicates = [HasAVX2], AddedComplexity = 1 in { def : Pat<(vinsertf128_insert:$ins (v4i64 VR256:$src1), (v2i64 VR128:$src2), |
