[WebAssembly] Reapply r252858, with svn add for the new file.

Switch to MC for instruction printing.

This encompasses several changes which are all interconnected:
 - Use the MC framework for printing almost all instructions.
 - AsmStrings are now live.
 - This introduces an indirection between LLVM vregs and WebAssembly registers,
   and a new pass, WebAssemblyRegNumbering, for computing a basic the mapping.
   This addresses some basic issues with argument registers and unused registers.
 - The way ARGUMENT instructions are handled no longer generates redundant
   get_local+set_local for every argument.

This also changes the assembly syntax somewhat; most notably, MC's printing
does not use sigils on label names, so those are no longer present, and
push/pop now have a sigil to keep them unambiguous.

The usage of set_local/get_local/$push/$pop will continue to evolve
significantly. This patch is just one step of a larger change.

llvm-svn: 252910

10 files changed, 219 insertions, 173 deletions

diff --git a/llvm/lib/Target/WebAssembly/CMakeLists.txt b/llvm/lib/Target/WebAssembly/CMakeLists.txt
index 96f039bed75..47fa9c631ba 100644
--- a/llvm/lib/Target/WebAssembly/CMakeLists.txt
+++ b/llvm/lib/Target/WebAssembly/CMakeLists.txt
@@ -21,6 +21,7 @@ add_llvm_target(WebAssemblyCodeGen
   WebAssemblyMachineFunctionInfo.cpp
   WebAssemblyMCInstLower.cpp
   WebAssemblyRegisterInfo.cpp
+  WebAssemblyRegNumbering.cpp
   WebAssemblySelectionDAGInfo.cpp
   WebAssemblySubtarget.cpp
   WebAssemblyTargetMachine.cpp
diff --git a/llvm/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp b/llvm/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp
index bb10f20fd6d..cc77f56dce3 100644
--- a/llvm/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp
+++ b/llvm/lib/Target/WebAssembly/InstPrinter/WebAssemblyInstPrinter.cpp
@@ -36,28 +36,50 @@ WebAssemblyInstPrinter::WebAssemblyInstPrinter(const MCAsmInfo &MAI,
 
 void WebAssemblyInstPrinter::printRegName(raw_ostream &OS,
                                           unsigned RegNo) const {
-  if (TargetRegisterInfo::isPhysicalRegister(RegNo))
-    OS << getRegisterName(RegNo);
-  else
-    OS << TargetRegisterInfo::virtReg2Index(RegNo);
+  // FIXME: Revisit whether we actually print the get_local explicitly.
+  OS << "(get_local " << RegNo << ")";
 }
 
 void WebAssemblyInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
                                        StringRef Annot,
                                        const MCSubtargetInfo &STI) {
   printInstruction(MI, OS);
+
+  const MCInstrDesc &Desc = MII.get(MI->getOpcode());
+  if (Desc.isVariadic())
+    for (unsigned i = Desc.getNumOperands(), e = MI->getNumOperands(); i < e;
+         ++i) {
+      OS << ", ";
+      printOperand(MI, i, OS);
+    }
+
   printAnnotation(OS, Annot);
 
   unsigned NumDefs = MII.get(MI->getOpcode()).getNumDefs();
   assert(NumDefs <= 1 &&
          "Instructions with multiple result values not implemented");
 
-  if (NumDefs != 0) {
+  // FIXME: Revisit whether we actually print the set_local explicitly.
+  if (NumDefs != 0)
     OS << "\n"
-          "\t" "set_local ";
-    printRegName(OS, MI->getOperand(0).getReg());
-    OS << ", pop";
-  }
+          "\t" "set_local " << MI->getOperand(0).getReg() << ", $pop";
+}
+
+static std::string toString(const APFloat &FP) {
+  static const size_t BufBytes = 128;
+  char buf[BufBytes];
+  if (FP.isNaN())
+    assert((FP.bitwiseIsEqual(APFloat::getQNaN(FP.getSemantics())) ||
+            FP.bitwiseIsEqual(
+                APFloat::getQNaN(FP.getSemantics(), /*Negative=*/true))) &&
+           "convertToHexString handles neither SNaN nor NaN payloads");
+  // Use C99's hexadecimal floating-point representation.
+  auto Written = FP.convertToHexString(
+      buf, /*hexDigits=*/0, /*upperCase=*/false, APFloat::rmNearestTiesToEven);
+  (void)Written;
+  assert(Written != 0);
+  assert(Written < BufBytes);
+  return buf;
 }
 
 void WebAssemblyInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
@@ -65,13 +87,13 @@ void WebAssemblyInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
   const MCOperand &Op = MI->getOperand(OpNo);
   if (Op.isReg()) {
     if (OpNo < MII.get(MI->getOpcode()).getNumDefs())
-      O << "push";
+      O << "$push";
     else
       printRegName(O, Op.getReg());
   } else if (Op.isImm())
-    O << '#' << Op.getImm();
+    O << Op.getImm();
   else if (Op.isFPImm())
-    O << '#' << Op.getFPImm();
+    O << toString(APFloat(Op.getFPImm()));
   else {
     assert(Op.isExpr() && "unknown operand kind in printOperand");
     Op.getExpr()->print(O, &MAI);
diff --git a/llvm/lib/Target/WebAssembly/WebAssembly.h b/llvm/lib/Target/WebAssembly/WebAssembly.h
index 0109c00ef2f..be6c20c1a7c 100644
--- a/llvm/lib/Target/WebAssembly/WebAssembly.h
+++ b/llvm/lib/Target/WebAssembly/WebAssembly.h
@@ -27,6 +27,7 @@ FunctionPass *createWebAssemblyISelDag(WebAssemblyTargetMachine &TM,
                                        CodeGenOpt::Level OptLevel);
 
 FunctionPass *createWebAssemblyCFGStackify();
+FunctionPass *createWebAssemblyRegNumbering();
 
 FunctionPass *createWebAssemblyRelooper();
 
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
index 27095ec51df..641d6ea2b86 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyAsmPrinter.cpp
@@ -15,12 +15,12 @@
 //===----------------------------------------------------------------------===//
 
 #include "WebAssembly.h"
+#include "InstPrinter/WebAssemblyInstPrinter.h"
+#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
+#include "WebAssemblyMCInstLower.h"
 #include "WebAssemblyMachineFunctionInfo.h"
 #include "WebAssemblyRegisterInfo.h"
 #include "WebAssemblySubtarget.h"
-#include "InstPrinter/WebAssemblyInstPrinter.h"
-#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
-
 #include "llvm/ADT/SmallString.h"
 #include "llvm/ADT/StringExtras.h"
 #include "llvm/CodeGen/Analysis.h"
@@ -28,7 +28,7 @@
 #include "llvm/CodeGen/MachineConstantPool.h"
 #include "llvm/CodeGen/MachineInstr.h"
 #include "llvm/IR/DataLayout.h"
-#include "llvm/IR/DebugInfo.h"
+#include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCStreamer.h"
 #include "llvm/MC/MCSymbol.h"
 #include "llvm/Support/Debug.h"
@@ -42,13 +42,12 @@ using namespace llvm;
 namespace {
 
 class WebAssemblyAsmPrinter final : public AsmPrinter {
-  const WebAssemblyInstrInfo *TII;
   const MachineRegisterInfo *MRI;
-  unsigned NumArgs;
+  const WebAssemblyFunctionInfo *MFI;
 
 public:
   WebAssemblyAsmPrinter(TargetMachine &TM, std::unique_ptr<MCStreamer> Streamer)
-      : AsmPrinter(TM, std::move(Streamer)), TII(nullptr), MRI(nullptr) {}
+      : AsmPrinter(TM, std::move(Streamer)), MRI(nullptr), MFI(nullptr) {}
 
 private:
   const char *getPassName() const override {
@@ -64,10 +63,8 @@ private:
   }
 
   bool runOnMachineFunction(MachineFunction &MF) override {
-    const auto &Subtarget = MF.getSubtarget<WebAssemblySubtarget>();
-    TII = Subtarget.getInstrInfo();
     MRI = &MF.getRegInfo();
-    NumArgs = MF.getInfo<WebAssemblyFunctionInfo>()->getParams().size();
+    MFI = MF.getInfo<WebAssemblyFunctionInfo>();
     return AsmPrinter::runOnMachineFunction(MF);
   }
 
@@ -82,10 +79,8 @@ private:
   void EmitEndOfAsmFile(Module &M) override;
 
   std::string getRegTypeName(unsigned RegNo) const;
-  static std::string toString(const APFloat &APF);
   const char *toString(MVT VT) const;
   std::string regToString(const MachineOperand &MO);
-  std::string argToString(const MachineOperand &MO);
 };
 
 } // end anonymous namespace
@@ -94,36 +89,6 @@ private:
 // Helpers.
 //===----------------------------------------------------------------------===//
 
-// Operand type (if any), followed by the lower-case version of the opcode's
-// name matching the names WebAssembly opcodes are expected to have. The
-// tablegen names are uppercase and suffixed with their type (after an
-// underscore). Conversions are additionally prefixed with their input type
-// (before a double underscore).
-static std::string OpcodeName(const WebAssemblyInstrInfo *TII,
-                              const MachineInstr *MI) {
-  std::string N(StringRef(TII->getName(MI->getOpcode())).lower());
-  std::string::size_type Len = N.length();
-  std::string::size_type Under = N.rfind('_');
-  bool HasType = std::string::npos != Under;
-  std::string::size_type NameEnd = HasType ? Under : Len;
-  std::string Name(&N[0], &N[NameEnd]);
-  if (!HasType)
-    return Name;
-  for (const char *typelessOpcode : { "return", "call", "br_if" })
-    if (Name == typelessOpcode)
-      return Name;
-  std::string Type(&N[NameEnd + 1], &N[Len]);
-  std::string::size_type DoubleUnder = Name.find("__");
-  bool IsConv = std::string::npos != DoubleUnder;
-  if (!IsConv)
-    return Type + '.' + Name;
-  std::string InType(&Name[0], &Name[DoubleUnder]);
-  return Type + '.' + std::string(&Name[DoubleUnder + 2], &Name[NameEnd]) +
-      '/' + InType;
-}
-
-static std::string toSymbol(StringRef S) { return ("$" + S).str(); }
-
 std::string WebAssemblyAsmPrinter::getRegTypeName(unsigned RegNo) const {
   const TargetRegisterClass *TRC = MRI->getRegClass(RegNo);
   for (MVT T : {MVT::i32, MVT::i64, MVT::f32, MVT::f64})
@@ -134,38 +99,12 @@ std::string WebAssemblyAsmPrinter::getRegTypeName(unsigned RegNo) const {
   return "?";
 }
 
-std::string WebAssemblyAsmPrinter::toString(const APFloat &FP) {
-  static const size_t BufBytes = 128;
-  char buf[BufBytes];
-  if (FP.isNaN())
-    assert((FP.bitwiseIsEqual(APFloat::getQNaN(FP.getSemantics())) ||
-            FP.bitwiseIsEqual(
-                APFloat::getQNaN(FP.getSemantics(), /*Negative=*/true))) &&
-           "convertToHexString handles neither SNaN nor NaN payloads");
-  // Use C99's hexadecimal floating-point representation.
-  auto Written = FP.convertToHexString(
-      buf, /*hexDigits=*/0, /*upperCase=*/false, APFloat::rmNearestTiesToEven);
-  (void)Written;
-  assert(Written != 0);
-  assert(Written < BufBytes);
-  return buf;
-}
-
 std::string WebAssemblyAsmPrinter::regToString(const MachineOperand &MO) {
   unsigned RegNo = MO.getReg();
   if (TargetRegisterInfo::isPhysicalRegister(RegNo))
     return WebAssemblyInstPrinter::getRegisterName(RegNo);
 
-  // WebAssembly arguments and local variables are in the same index space, and
-  // there are no explicit varargs, so we just add the number of arguments to
-  // the virtual register number to get the local variable number.
-  return utostr(TargetRegisterInfo::virtReg2Index(RegNo) + NumArgs);
-}
-
-std::string WebAssemblyAsmPrinter::argToString(const MachineOperand &MO) {
-  unsigned ArgNo = MO.getImm();
-  // Same as above, but we don't need to add NumArgs here.
-  return utostr(ArgNo);
+  return utostr(MFI->getWAReg(RegNo));
 }
 
 const char *WebAssemblyAsmPrinter::toString(MVT VT) const {
@@ -203,26 +142,22 @@ void WebAssemblyAsmPrinter::EmitFunctionBodyStart() {
   SmallString<128> Str;
   raw_svector_ostream OS(Str);
 
-  for (MVT VT : MF->getInfo<WebAssemblyFunctionInfo>()->getParams())
-    OS << "\t" ".param "
-       << toString(VT) << '\n';
-  for (MVT VT : MF->getInfo<WebAssemblyFunctionInfo>()->getResults())
-    OS << "\t" ".result "
-       << toString(VT) << '\n';
+  for (MVT VT : MFI->getParams())
+    OS << "\t" ".param " << toString(VT) << '\n';
+  for (MVT VT : MFI->getResults())
+    OS << "\t" ".result " << toString(VT) << '\n';
 
   bool FirstVReg = true;
   for (unsigned Idx = 0, IdxE = MRI->getNumVirtRegs(); Idx != IdxE; ++Idx) {
     unsigned VReg = TargetRegisterInfo::index2VirtReg(Idx);
-    // FIXME: Don't skip dead virtual registers for now: that would require
-    //        remapping all locals' numbers.
-    // if (!MRI->use_empty(VReg)) {
-    if (FirstVReg)
-      OS << "\t" ".local ";
-    else
-      OS << ", ";
-    OS << getRegTypeName(VReg);
-    FirstVReg = false;
-    //}
+    if (!MRI->use_empty(VReg)) {
+      if (FirstVReg)
+        OS << "\t" ".local ";
+      else
+        OS << ", ";
+      OS << getRegTypeName(VReg);
+      FirstVReg = false;
+    }
   }
   if (!FirstVReg)
     OS << '\n';
@@ -236,80 +171,36 @@ void WebAssemblyAsmPrinter::EmitFunctionBodyStart() {
 
 void WebAssemblyAsmPrinter::EmitInstruction(const MachineInstr *MI) {
   DEBUG(dbgs() << "EmitInstruction: " << *MI << '\n');
-  SmallString<128> Str;
-  raw_svector_ostream OS(Str);
 
   unsigned NumDefs = MI->getDesc().getNumDefs();
   assert(NumDefs <= 1 &&
          "Instructions with multiple result values not implemented");
 
-  OS << '\t';
-
   switch (MI->getOpcode()) {
-  case TargetOpcode::COPY:
-    OS << "get_local push, " << regToString(MI->getOperand(1));
+  case TargetOpcode::COPY: {
+    // TODO: Figure out a way to lower COPY instructions to MCInst form.
+    SmallString<128> Str;
+    raw_svector_ostream OS(Str);
+    OS << "\t" "set_local " << regToString(MI->getOperand(0)) << ", "
+               "(get_local " << regToString(MI->getOperand(1)) << ")";
+    OutStreamer->EmitRawText(OS.str());
     break;
+  }
   case WebAssembly::ARGUMENT_I32:
   case WebAssembly::ARGUMENT_I64:
   case WebAssembly::ARGUMENT_F32:
   case WebAssembly::ARGUMENT_F64:
-    OS << "get_local push, " << argToString(MI->getOperand(1));
+    // These represent values which are live into the function entry, so there's
+    // no instruction to emit.
     break;
   default: {
-    OS << OpcodeName(TII, MI);
-    bool NeedComma = false;
-    bool DefsPushed = false;
-    if (NumDefs != 0 && !MI->isCall()) {
-      OS << " push";
-      NeedComma = true;
-      DefsPushed = true;
-    }
-    for (const MachineOperand &MO : MI->uses()) {
-      if (MO.isReg() && MO.isImplicit())
-        continue;
-      if (NeedComma)
-        OS << ',';
-      NeedComma = true;
-      OS << ' ';
-      switch (MO.getType()) {
-      default:
-        llvm_unreachable("unexpected machine operand type");
-      case MachineOperand::MO_Register:
-        OS << "(get_local " << regToString(MO) << ')';
-        break;
-      case MachineOperand::MO_Immediate:
-        OS << MO.getImm();
-        break;
-      case MachineOperand::MO_FPImmediate:
-        OS << toString(MO.getFPImm()->getValueAPF());
-        break;
-      case MachineOperand::MO_GlobalAddress:
-        OS << toSymbol(MO.getGlobal()->getName());
-        break;
-      case MachineOperand::MO_MachineBasicBlock:
-        OS << toSymbol(MO.getMBB()->getSymbol()->getName());
-        break;
-      }
-      if (NumDefs != 0 && !DefsPushed) {
-        // Special-case for calls; print the push after the callee.
-        assert(MI->isCall());
-        OS << ", push";
-        DefsPushed = true;
-      }
-    }
+    WebAssemblyMCInstLower MCInstLowering(OutContext, *this);
+    MCInst TmpInst;
+    MCInstLowering.Lower(MI, TmpInst);
+    EmitToStreamer(*OutStreamer, TmpInst);
     break;
   }
   }
-
-  OutStreamer->EmitRawText(OS.str());
-
-  if (NumDefs != 0) {
-    SmallString<128> Str;
-    raw_svector_ostream OS(Str);
-    const MachineOperand &Operand = MI->getOperand(0);
-    OS << "\tset_local " << regToString(Operand) << ", pop";
-    OutStreamer->EmitRawText(OS.str());
-  }
 }
 
 static void ComputeLegalValueVTs(LLVMContext &Context,
@@ -340,8 +231,8 @@ void WebAssemblyAsmPrinter::EmitEndOfAsmFile(Module &M) {
       if (Str.empty())
         OS << "\t.imports\n";
 
-      OS << "\t.import " << toSymbol(F.getName()) << " \"\" \"" << F.getName()
-         << "\"";
+      MCSymbol *Sym = OutStreamer->getContext().getOrCreateSymbol(F.getName());
+      OS << "\t.import " << *Sym << " \"\" " << *Sym;
 
       const WebAssemblyTargetLowering &TLI =
           *TM.getSubtarget<WebAssemblySubtarget>(F).getTargetLowering();
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td
index 82a42f564ab..d175b6ae626 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrCall.td
@@ -23,9 +23,11 @@ def : I<(outs), (ins i64imm:$amt1, i64imm:$amt2),
 
 multiclass CALL<WebAssemblyRegClass vt> {
   def CALL_#vt : I<(outs vt:$dst), (ins global:$callee, variable_ops),
-                   [(set vt:$dst, (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee)))]>;
+                   [(set vt:$dst, (WebAssemblycall1 (WebAssemblywrapper tglobaladdr:$callee)))],
+                   "call $callee, $dst">;
   def CALL_INDIRECT_#vt : I<(outs vt:$dst), (ins I32:$callee, variable_ops),
-                            [(set vt:$dst, (WebAssemblycall1 I32:$callee))]>;
+                            [(set vt:$dst, (WebAssemblycall1 I32:$callee))],
+                            "call_indirect $callee, $dst">;
 }
 let Uses = [SP32, SP64], isCall = 1 in {
   defm : CALL<I32>;
@@ -34,9 +36,11 @@ let Uses = [SP32, SP64], isCall = 1 in {
   defm : CALL<F64>;
 
   def CALL_VOID : I<(outs), (ins global:$callee, variable_ops),
-                    [(WebAssemblycall0 (WebAssemblywrapper tglobaladdr:$callee))]>;
+                    [(WebAssemblycall0 (WebAssemblywrapper tglobaladdr:$callee))],
+                    "call $callee">;
   def CALL_INDIRECT_VOID : I<(outs), (ins I32:$callee, variable_ops),
-                             [(WebAssemblycall0 I32:$callee)]>;
+                             [(WebAssemblycall0 I32:$callee)],
+                             "call_indirect $callee">;
 } // Uses = [SP32,SP64], isCall = 1
 
 /*
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td b/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
index 6aae5d38d0b..acfd738a8fa 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyInstrControl.td
@@ -41,9 +41,11 @@ def BR   : I<(outs), (ins bb_op:$dst),
 // currently.
 let isTerminator = 1, hasCtrlDep = 1, isBarrier = 1 in {
 def SWITCH_I32 : I<(outs), (ins I32:$index, variable_ops),
-                   [(WebAssemblyswitch I32:$index)]>;
+                   [(WebAssemblyswitch I32:$index)],
+                   "switch $index">;
 def SWITCH_I64 : I<(outs), (ins I64:$index, variable_ops),
-                   [(WebAssemblyswitch I64:$index)]>;
+                   [(WebAssemblyswitch I64:$index)],
+                   "switch $index">;
 } // isTerminator = 1, hasCtrlDep = 1, isBarrier = 1
 
 // Placemarkers to indicate the start of a block or loop scope.
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
index 59acbdbe63d..4226a5385ce 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyMCInstLower.cpp
@@ -14,11 +14,13 @@
 //===----------------------------------------------------------------------===//
 
 #include "WebAssemblyMCInstLower.h"
+#include "WebAssemblyMachineFunctionInfo.h"
 #include "llvm/ADT/SmallString.h"
-#include "llvm/IR/Constants.h"
 #include "llvm/CodeGen/AsmPrinter.h"
 #include "llvm/CodeGen/MachineBasicBlock.h"
+#include "llvm/CodeGen/MachineFunction.h"
 #include "llvm/CodeGen/MachineInstr.h"
+#include "llvm/IR/Constants.h"
 #include "llvm/MC/MCAsmInfo.h"
 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCExpr.h"
@@ -55,25 +57,36 @@ void WebAssemblyMCInstLower::Lower(const MachineInstr *MI,
     default:
       MI->dump();
       llvm_unreachable("unknown operand type");
-    case MachineOperand::MO_Register:
+    case MachineOperand::MO_Register: {
       // Ignore all implicit register operands.
       if (MO.isImplicit())
         continue;
-      MCOp = MCOperand::createReg(MO.getReg());
+      // TODO: Handle physical registers.
+      const WebAssemblyFunctionInfo &MFI =
+          *MI->getParent()->getParent()->getInfo<WebAssemblyFunctionInfo>();
+      unsigned WAReg = MFI.getWAReg(MO.getReg());
+      MCOp = MCOperand::createReg(WAReg);
       break;
+    }
     case MachineOperand::MO_Immediate:
       MCOp = MCOperand::createImm(MO.getImm());
       break;
-    case MachineOperand::MO_FPImmediate:
-      MCOp = MCOperand::createFPImm(
-          MO.getFPImm()->getValueAPF().convertToDouble());
+    case MachineOperand::MO_FPImmediate: {
+      // TODO: MC converts all floating point immediate operands to double.
+      // This is fine for numeric values, but may cause NaNs to change bits.
+      const ConstantFP *Imm = MO.getFPImm();
+      if (Imm->getType()->isFloatTy())
+        MCOp = MCOperand::createFPImm(Imm->getValueAPF().convertToFloat());
+      else if (Imm->getType()->isDoubleTy())
+        MCOp = MCOperand::createFPImm(Imm->getValueAPF().convertToDouble());
+      else
+        llvm_unreachable("unknown floating point immediate type");
       break;
+    }
     case MachineOperand::MO_MachineBasicBlock:
       MCOp = MCOperand::createExpr(
           MCSymbolRefExpr::create(MO.getMBB()->getSymbol(), Ctx));
       break;
-    case MachineOperand::MO_RegisterMask:
-      continue;
     case MachineOperand::MO_GlobalAddress:
       MCOp = LowerSymbolOperand(MO, GetGlobalAddressSymbol(MO));
       break;
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h b/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
index bac0dfafcf3..81273c00471 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyMachineFunctionInfo.h
@@ -30,9 +30,11 @@ class WebAssemblyFunctionInfo final : public MachineFunctionInfo {
   std::vector<MVT> Params;
   std::vector<MVT> Results;
 
+  /// A mapping from CodeGen vreg index to WebAssembly register number.
+  std::vector<unsigned> WARegs;
+
 public:
-  explicit WebAssemblyFunctionInfo(MachineFunction &MF)
-      : MF(MF) {}
+  explicit WebAssemblyFunctionInfo(MachineFunction &MF) : MF(MF) {}
   ~WebAssemblyFunctionInfo() override;
 
   void addParam(MVT VT) { Params.push_back(VT); }
@@ -40,6 +42,17 @@ public:
 
   void addResult(MVT VT) { Results.push_back(VT); }
   const std::vector<MVT> &getResults() const { return Results; }
+
+  void initWARegs() {
+    assert(WARegs.empty());
+    WARegs.resize(MF.getRegInfo().getNumVirtRegs(), -1u);
+  }
+  void setWAReg(unsigned VReg, unsigned WAReg) {
+    WARegs[TargetRegisterInfo::virtReg2Index(VReg)] = WAReg;
+  }
+  unsigned getWAReg(unsigned VReg) const {
+    return WARegs[TargetRegisterInfo::virtReg2Index(VReg)];
+  }
 };
 
 } // end namespace llvm
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
new file mode 100644
index 00000000000..96b0799d1c3
--- /dev/null
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyRegNumbering.cpp
@@ -0,0 +1,98 @@
+//===-- WebAssemblyRegNumbering.cpp - Register Numbering ------------------===//
+//
+//                     The LLVM Compiler Infrastructure
+//
+// This file is distributed under the University of Illinois Open Source
+// License. See LICENSE.TXT for details.
+//
+//===----------------------------------------------------------------------===//
+///
+/// \file
+/// \brief This file implements a pass which assigns WebAssembly register
+/// numbers for CodeGen virtual registers.
+///
+//===----------------------------------------------------------------------===//
+
+#include "WebAssembly.h"
+#include "MCTargetDesc/WebAssemblyMCTargetDesc.h"
+#include "WebAssemblyMachineFunctionInfo.h"
+#include "WebAssemblySubtarget.h"
+#include "llvm/ADT/SCCIterator.h"
+#include "llvm/CodeGen/MachineFunction.h"
+#include "llvm/CodeGen/MachineInstrBuilder.h"
+#include "llvm/CodeGen/MachineLoopInfo.h"
+#include "llvm/CodeGen/MachineRegisterInfo.h"
+#include "llvm/CodeGen/Passes.h"
+#include "llvm/Support/Debug.h"
+#include "llvm/Support/raw_ostream.h"
+using namespace llvm;
+
+#define DEBUG_TYPE "wasm-reg-numbering"
+
+namespace {
+class WebAssemblyRegNumbering final : public MachineFunctionPass {
+  const char *getPassName() const override {
+    return "WebAssembly Register Numbering";
+  }
+
+  void getAnalysisUsage(AnalysisUsage &AU) const override {
+    AU.setPreservesCFG();
+    MachineFunctionPass::getAnalysisUsage(AU);
+  }
+
+  bool runOnMachineFunction(MachineFunction &MF) override;
+
+public:
+  static char ID; // Pass identification, replacement for typeid
+  WebAssemblyRegNumbering() : MachineFunctionPass(ID) {}
+};
+} // end anonymous namespace
+
+char WebAssemblyRegNumbering::ID = 0;
+FunctionPass *llvm::createWebAssemblyRegNumbering() {
+  return new WebAssemblyRegNumbering();
+}
+
+bool WebAssemblyRegNumbering::runOnMachineFunction(MachineFunction &MF) {
+  DEBUG(dbgs() << "********** Register Numbering **********\n"
+                  "********** Function: "
+               << MF.getName() << '\n');
+
+  WebAssemblyFunctionInfo &MFI = *MF.getInfo<WebAssemblyFunctionInfo>();
+  MachineRegisterInfo &MRI = MF.getRegInfo();
+
+  MFI.initWARegs();
+
+  // WebAssembly argument registers are in the same index space as local
+  // variables. Assign the numbers for them first.
+  for (MachineBasicBlock &MBB : MF) {
+    for (MachineInstr &MI : MBB) {
+      switch (MI.getOpcode()) {
+      case WebAssembly::ARGUMENT_I32:
+      case WebAssembly::ARGUMENT_I64:
+      case WebAssembly::ARGUMENT_F32:
+      case WebAssembly::ARGUMENT_F64:
+        MFI.setWAReg(MI.getOperand(0).getReg(), MI.getOperand(1).getImm());
+        break;
+      default:
+        break;
+      }
+    }
+  }
+
+  // Then assign regular WebAssembly registers for all remaining used
+  // virtual registers.
+  unsigned NumArgRegs = MFI.getParams().size();
+  unsigned NumVRegs = MF.getRegInfo().getNumVirtRegs();
+  unsigned CurReg = 0;
+  for (unsigned VRegIdx = 0; VRegIdx < NumVRegs; ++VRegIdx) {
+    unsigned VReg = TargetRegisterInfo::index2VirtReg(VRegIdx);
+    // Skip unused registers.
+    if (MRI.use_empty(VReg))
+      continue;
+    if (MFI.getWAReg(VReg) == -1u)
+      MFI.setWAReg(VReg, NumArgRegs + CurReg++);
+  }
+
+  return true;
+}
diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
index 99a24266686..5aae7108474 100644
--- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
+++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp
@@ -175,4 +175,5 @@ void WebAssemblyPassConfig::addPreSched2() {}
 
 void WebAssemblyPassConfig::addPreEmitPass() {
   addPass(createWebAssemblyCFGStackify());
+  addPass(createWebAssemblyRegNumbering());
 }