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| author | Christopher Lamb <christopher.lamb@gmail.com> | 2007-07-26 07:48:21 +0000 |
|---|---|---|
| committer | Christopher Lamb <christopher.lamb@gmail.com> | 2007-07-26 07:48:21 +0000 |
| commit | cde0ee52215ad807e12c6887f670025fc95139c8 (patch) | |
| tree | 0c3cc57364acfd207710919316571bdd097cf455 /llvm/lib/Target | |
| parent | ce5185b18100dc29acb8200a3a0d1b08e819cc0d (diff) | |
| download | bcm5719-llvm-cde0ee52215ad807e12c6887f670025fc95139c8.tar.gz bcm5719-llvm-cde0ee52215ad807e12c6887f670025fc95139c8.zip | |
Add target independent MachineInstr's to represent subreg insert/extract in MBB's. PR1350
llvm-svn: 40518
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/Target.td | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/llvm/lib/Target/Target.td b/llvm/lib/Target/Target.td index 1583a93a988..84f62273d51 100644 --- a/llvm/lib/Target/Target.td +++ b/llvm/lib/Target/Target.td @@ -321,6 +321,18 @@ def LABEL : Instruction { let Namespace = "TargetInstrInfo"; let hasCtrlDep = 1; } +def EXTRACT_SUBREG : Instruction { + let OutOperandList = (ops variable_ops); + let InOperandList = (ops variable_ops); + let AsmString = ""; + let Namespace = "TargetInstrInfo"; +} +def INSERT_SUBREG : Instruction { + let OutOperandList = (ops variable_ops); + let InOperandList = (ops variable_ops); + let AsmString = ""; + let Namespace = "TargetInstrInfo"; +} //===----------------------------------------------------------------------===// // AsmWriter - This class can be implemented by targets that need to customize |
