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| author | Justin Holewinski <justin.holewinski@gmail.com> | 2011-10-06 20:00:33 +0000 |
|---|---|---|
| committer | Justin Holewinski <justin.holewinski@gmail.com> | 2011-10-06 20:00:33 +0000 |
| commit | c8ab2c1d993918169acfc5628d7425d5bb880dd5 (patch) | |
| tree | f313b0b3645e5d656e2ece5e1a882bcbce643635 /llvm/lib/Target | |
| parent | f9389a361e1c5ea8819f48935ba92f31083b16ea (diff) | |
| download | bcm5719-llvm-c8ab2c1d993918169acfc5628d7425d5bb880dd5.tar.gz bcm5719-llvm-c8ab2c1d993918169acfc5628d7425d5bb880dd5.zip | |
PTX: Implement signed division
llvm-svn: 141306
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/PTX/PTXInstrInfo.td | 39 |
1 files changed, 34 insertions, 5 deletions
diff --git a/llvm/lib/Target/PTX/PTXInstrInfo.td b/llvm/lib/Target/PTX/PTXInstrInfo.td index 1b1b92cdfe2..a3fcea9038c 100644 --- a/llvm/lib/Target/PTX/PTXInstrInfo.td +++ b/llvm/lib/Target/PTX/PTXInstrInfo.td @@ -167,6 +167,34 @@ multiclass PTX_INT3<string opcstr, SDNode opnode> { [(set RegI64:$d, (opnode RegI64:$a, imm:$b))]>; } +//===- Integer Instructions - 3 Operand Form (Signed) ---------------------===// +multiclass PTX_INT3_SIGNED<string opcstr, SDNode opnode> { + def rr16 : InstPTX<(outs RegI16:$d), + (ins RegI16:$a, RegI16:$b), + !strconcat(opcstr, ".s16\t$d, $a, $b"), + [(set RegI16:$d, (opnode RegI16:$a, RegI16:$b))]>; + def ri16 : InstPTX<(outs RegI16:$d), + (ins RegI16:$a, i16imm:$b), + !strconcat(opcstr, ".s16\t$d, $a, $b"), + [(set RegI16:$d, (opnode RegI16:$a, imm:$b))]>; + def rr32 : InstPTX<(outs RegI32:$d), + (ins RegI32:$a, RegI32:$b), + !strconcat(opcstr, ".s32\t$d, $a, $b"), + [(set RegI32:$d, (opnode RegI32:$a, RegI32:$b))]>; + def ri32 : InstPTX<(outs RegI32:$d), + (ins RegI32:$a, i32imm:$b), + !strconcat(opcstr, ".s32\t$d, $a, $b"), + [(set RegI32:$d, (opnode RegI32:$a, imm:$b))]>; + def rr64 : InstPTX<(outs RegI64:$d), + (ins RegI64:$a, RegI64:$b), + !strconcat(opcstr, ".s64\t$d, $a, $b"), + [(set RegI64:$d, (opnode RegI64:$a, RegI64:$b))]>; + def ri64 : InstPTX<(outs RegI64:$d), + (ins RegI64:$a, i64imm:$b), + !strconcat(opcstr, ".s64\t$d, $a, $b"), + [(set RegI64:$d, (opnode RegI64:$a, imm:$b))]>; +} + //===- Bitwise Logic Instructions - 3 Operand Form ------------------------===// multiclass PTX_LOGIC<string opcstr, SDNode opnode> { def ripreds : InstPTX<(outs RegPred:$d), @@ -453,11 +481,12 @@ multiclass PTX_SELP<RegisterClass RC, string regclsname, Operand immcls, ///===- Integer Arithmetic Instructions -----------------------------------===// -defm ADD : PTX_INT3<"add", add>; -defm SUB : PTX_INT3<"sub", sub>; -defm MUL : PTX_INT3<"mul.lo", mul>; // FIXME: Allow 32x32 -> 64 multiplies -defm DIV : PTX_INT3<"div", udiv>; -defm REM : PTX_INT3<"rem", urem>; +defm ADD : PTX_INT3<"add", add>; +defm SUB : PTX_INT3<"sub", sub>; +defm MUL : PTX_INT3<"mul.lo", mul>; // FIXME: Allow 32x32 -> 64 multiplies +defm DIV : PTX_INT3<"div", udiv>; +defm SDIV : PTX_INT3_SIGNED<"div", sdiv>; +defm REM : PTX_INT3<"rem", urem>; ///===- Floating-Point Arithmetic Instructions ----------------------------===// |
