diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-07 23:33:08 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-07 23:33:08 +0000 |
| commit | c8a6df71305f1c49f27371c1a4310685854c46c1 (patch) | |
| tree | 407ffa4b01407d0f6b562dcb84a1c948650f8499 /llvm/lib/Target | |
| parent | 748538e166ef64e8c9bddc7736cc9d44a5574092 (diff) | |
| download | bcm5719-llvm-c8a6df71305f1c49f27371c1a4310685854c46c1.tar.gz bcm5719-llvm-c8a6df71305f1c49f27371c1a4310685854c46c1.zip | |
AMDGPU/GlobalISel: Clamp G_SITOFP/G_UITOFP sources
llvm-svn: 373989
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 9 |
1 files changed, 6 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index dfb8ed55d6b..c1c111a762d 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -424,11 +424,14 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_, .scalarize(0); // TODO: Split s1->s64 during regbankselect for VALU. - getActionDefinitionsBuilder({G_SITOFP, G_UITOFP}) + auto &IToFP = getActionDefinitionsBuilder({G_SITOFP, G_UITOFP}) .legalFor({{S32, S32}, {S64, S32}, {S16, S32}, {S32, S1}, {S16, S1}, {S64, S1}}) .lowerFor({{S32, S64}}) - .customFor({{S64, S64}}) - .scalarize(0); + .customFor({{S64, S64}}); + if (ST.has16BitInsts()) + IToFP.legalFor({{S16, S16}}); + IToFP.clampScalar(1, S32, S64) + .scalarize(0); auto &FPToI = getActionDefinitionsBuilder({G_FPTOSI, G_FPTOUI}) .legalFor({{S32, S32}, {S32, S64}, {S32, S16}}); |
