diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-11-14 23:46:42 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-11-14 23:46:42 +0000 |
| commit | c8903125cd7c7766ef9c8eef3ed3a9d89a6fe554 (patch) | |
| tree | f8adeee4bbc977e4c974fddb1d2dd5eacab16209 /llvm/lib/Target | |
| parent | 1eab6c12f76327c380661ea194127a59553f5867 (diff) | |
| download | bcm5719-llvm-c8903125cd7c7766ef9c8eef3ed3a9d89a6fe554.tar.gz bcm5719-llvm-c8903125cd7c7766ef9c8eef3ed3a9d89a6fe554.zip | |
AMDGPU: Handle or in multi-use shl ptr combine
llvm-svn: 318223
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp index 0be8e810545..f7fe652dbea 100644 --- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp +++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp @@ -5199,8 +5199,8 @@ SDValue SITargetLowering::performSHLPtrCombine(SDNode *N, // We only do this to handle cases where it's profitable when there are // multiple uses of the add, so defer to the standard combine. - // TODO: Support or - if (N0.getOpcode() != ISD::ADD || N0->hasOneUse()) + if ((N0.getOpcode() != ISD::ADD && N0.getOpcode() != ISD::OR) || + N0->hasOneUse()) return SDValue(); const ConstantSDNode *CN1 = dyn_cast<ConstantSDNode>(N1); |
