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authorMatthias Braun <matze@braunis.de>2018-11-06 19:00:11 +0000
committerMatthias Braun <matze@braunis.de>2018-11-06 19:00:11 +0000
commitc6613879ce57e9e9947b9a91f9f0a9ef7382fb2c (patch)
treef8f37a063acee6b133a37cb8381bfb40060e3717 /llvm/lib/Target
parentfa441730bb7651c7c3528fcfc705b437ac04befd (diff)
downloadbcm5719-llvm-c6613879ce57e9e9947b9a91f9f0a9ef7382fb2c.tar.gz
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LivePhysRegs/IfConversion: Change some types from unsigned to MCPhysReg; NFC
Change the type in a couple of lists and sets that only store physical registers from unsigned to MCPhysRegs. The later is only 16bits and saves us a bit of memory. llvm-svn: 346254
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp2
-rw-r--r--llvm/lib/Target/PowerPC/PPCExpandISEL.cpp2
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.cpp2
3 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
index a2598244dab..2f3e18c99c5 100644
--- a/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonFrameLowering.cpp
@@ -1708,7 +1708,7 @@ bool HexagonFrameLowering::expandStoreVec2(MachineBasicBlock &B,
// register that is entirely undefined.
LivePhysRegs LPR(HRI);
LPR.addLiveIns(B);
- SmallVector<std::pair<unsigned, const MachineOperand*>,2> Clobbers;
+ SmallVector<std::pair<MCPhysReg, const MachineOperand*>,2> Clobbers;
for (auto R = B.begin(); R != It; ++R) {
Clobbers.clear();
LPR.stepForward(*R, Clobbers);
diff --git a/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp b/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp
index fe41e1b36a5..a03e691ef5b 100644
--- a/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp
+++ b/llvm/lib/Target/PowerPC/PPCExpandISEL.cpp
@@ -392,7 +392,7 @@ void PPCExpandISEL::reorganizeBlockLayout(BlockISELList &BIL,
// liveness state at the end of MBB (liveOut of MBB) as the liveIn for
// NewSuccessor. Otherwise, will cause cyclic dependence.
LivePhysRegs LPR(*MF->getSubtarget<PPCSubtarget>().getRegisterInfo());
- SmallVector<std::pair<unsigned, const MachineOperand *>, 2> Clobbers;
+ SmallVector<std::pair<MCPhysReg, const MachineOperand *>, 2> Clobbers;
for (MachineInstr &MI : *MBB)
LPR.stepForward(MI, Clobbers);
for (auto &LI : LPR)
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index ae45301f04b..fe26389050c 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -2550,7 +2550,7 @@ void X86InstrInfo::replaceBranchWithTailCall(
// call. This way they still appear live across the call.
LivePhysRegs LiveRegs(getRegisterInfo());
LiveRegs.addLiveOuts(MBB);
- SmallVector<std::pair<unsigned, const MachineOperand *>, 8> Clobbers;
+ SmallVector<std::pair<MCPhysReg, const MachineOperand *>, 8> Clobbers;
LiveRegs.stepForward(*MIB, Clobbers);
for (const auto &C : Clobbers) {
MIB.addReg(C.first, RegState::Implicit);
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