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| author | Chris Lattner <sabre@nondot.org> | 2006-04-18 16:44:51 +0000 |
|---|---|---|
| committer | Chris Lattner <sabre@nondot.org> | 2006-04-18 16:44:51 +0000 |
| commit | bfc2c683869e61df7eba82d408ca6c0f75d79610 (patch) | |
| tree | 356efa6afe560026adcec26ef361b58256b9b542 /llvm/lib/Target | |
| parent | f776fc2c98ae5ea44af04c4c8ed131737b20d69c (diff) | |
| download | bcm5719-llvm-bfc2c683869e61df7eba82d408ca6c0f75d79610.tar.gz bcm5719-llvm-bfc2c683869e61df7eba82d408ca6c0f75d79610.zip | |
Teach the codegen about instructions used for SSE spill code, allowing it
to optimize cases where it has to spill a lot
llvm-svn: 27801
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 5c4ab1bdf36..31a4f6fe2e7 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -56,6 +56,8 @@ unsigned X86InstrInfo::isLoadFromStackSlot(MachineInstr *MI, case X86::FpLD64m: case X86::MOVSSrm: case X86::MOVSDrm: + case X86::MOVAPSrm: + case X86::MOVAPDrm: if (MI->getOperand(1).isFrameIndex() && MI->getOperand(2).isImmediate() && MI->getOperand(3).isRegister() && MI->getOperand(4).isImmediate() && MI->getOperand(2).getImmedValue() == 1 && @@ -79,6 +81,8 @@ unsigned X86InstrInfo::isStoreToStackSlot(MachineInstr *MI, case X86::FpSTP64m: case X86::MOVSSmr: case X86::MOVSDmr: + case X86::MOVAPSmr: + case X86::MOVAPDmr: if (MI->getOperand(0).isFrameIndex() && MI->getOperand(1).isImmediate() && MI->getOperand(2).isRegister() && MI->getOperand(3).isImmediate() && MI->getOperand(1).getImmedValue() == 1 && |
