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authorKrzysztof Parzyszek <kparzysz@codeaurora.org>2018-02-06 19:08:41 +0000
committerKrzysztof Parzyszek <kparzysz@codeaurora.org>2018-02-06 19:08:41 +0000
commitbe253e797b58a923371c0629052da2ec1d59c3aa (patch)
tree8b1fb76eff379eef597a0aa3a4b04858e9249d3d /llvm/lib/Target
parent9e916e5e0e05f293b85cd97c03a7e38d28bb74d2 (diff)
downloadbcm5719-llvm-be253e797b58a923371c0629052da2ec1d59c3aa.tar.gz
bcm5719-llvm-be253e797b58a923371c0629052da2ec1d59c3aa.zip
[Hexagon] Don't form new-value jumps from floating-point instructions
Additionally, verify that the register defined by the producer is a 32-bit register. llvm-svn: 324381
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp16
1 files changed, 16 insertions, 0 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp b/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
index ffa447cc131..bb733fed044 100644
--- a/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
+++ b/llvm/lib/Target/Hexagon/HexagonNewValueJump.cpp
@@ -142,6 +142,22 @@ static bool canBeFeederToNewValueJump(const HexagonInstrInfo *QII,
if (QII->isSolo(*II))
return false;
+ if (QII->isFloat(*II))
+ return false;
+
+ // Make sure that the (unique) def operand is a register from IntRegs.
+ bool HadDef = false;
+ for (const MachineOperand &Op : II->operands()) {
+ if (!Op.isReg() || !Op.isDef())
+ continue;
+ if (HadDef)
+ return false;
+ HadDef = true;
+ if (!Hexagon::IntRegsRegClass.contains(Op.getReg()))
+ return false;
+ }
+ assert(HadDef);
+
// Make sure there there is no 'def' or 'use' of any of the uses of
// feeder insn between it's definition, this MI and jump, jmpInst
// skipping compare, cmpInst.
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