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author | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2017-04-07 13:31:36 +0000 |
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committer | Petar Jovanovic <petar.jovanovic@imgtec.com> | 2017-04-07 13:31:36 +0000 |
commit | bc54eb89ad8f8a972cd49a73ab449676131e8525 (patch) | |
tree | ce2b736eb84af4b63cea7af860f48794f11caf1a /llvm/lib/Target | |
parent | e5147247b8cea11e06225e1ee27a5ed4af57824f (diff) | |
download | bcm5719-llvm-bc54eb89ad8f8a972cd49a73ab449676131e8525.tar.gz bcm5719-llvm-bc54eb89ad8f8a972cd49a73ab449676131e8525.zip |
[mips][msa] Fix generation of bm(n)zi and bins[lr]i instructions
We have two cases here, the first one being the following instruction
selection from the builtin function:
bm(n)zi builtin -> vselect node -> bins[lr]i machine instruction
In case of bm(n)zi having an immediate which has either its high or low bits
set, a bins[lr] instruction can be selected through the selectVSplatMask[LR]
function. The function counts the number of bits set, and that value is
being passed to the bins[lr]i instruction as its immediate, which in turn
copies immediate modulo the size of the element in bits plus 1 as per specs,
where we get the off-by-one-error.
The other case is:
bins[lr]i -> vselect node -> bsel.v
In this case, a bsel.v instruction gets selected with a mask having one bit
less set than required.
Patch by Stefan Maksimovic.
Differential Revision: https://reviews.llvm.org/D30579
llvm-svn: 299768
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp | 4 | ||||
-rw-r--r-- | llvm/lib/Target/Mips/MipsSEISelLowering.cpp | 4 |
2 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp b/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp index 9e854f8db6d..c9cf9363b8c 100644 --- a/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp +++ b/llvm/lib/Target/Mips/MipsSEISelDAGToDAG.cpp @@ -692,7 +692,7 @@ bool MipsSEDAGToDAGISel::selectVSplatMaskL(SDValue N, SDValue &Imm) const { // as the original value. if (ImmValue == ~(~ImmValue & ~(~ImmValue + 1))) { - Imm = CurDAG->getTargetConstant(ImmValue.countPopulation(), SDLoc(N), + Imm = CurDAG->getTargetConstant(ImmValue.countPopulation() - 1, SDLoc(N), EltTy); return true; } @@ -724,7 +724,7 @@ bool MipsSEDAGToDAGISel::selectVSplatMaskR(SDValue N, SDValue &Imm) const { // Extract the run of set bits starting with bit zero, and test that the // result is the same as the original value if (ImmValue == (ImmValue & ~(ImmValue + 1))) { - Imm = CurDAG->getTargetConstant(ImmValue.countPopulation(), SDLoc(N), + Imm = CurDAG->getTargetConstant(ImmValue.countPopulation() - 1, SDLoc(N), EltTy); return true; } diff --git a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp index 71bccc52482..e2da8477295 100644 --- a/llvm/lib/Target/Mips/MipsSEISelLowering.cpp +++ b/llvm/lib/Target/Mips/MipsSEISelLowering.cpp @@ -1644,7 +1644,7 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, if (Op->getConstantOperandVal(3) >= EltTy.getSizeInBits()) report_fatal_error("Immediate out of range"); APInt Mask = APInt::getHighBitsSet(EltTy.getSizeInBits(), - Op->getConstantOperandVal(3)); + Op->getConstantOperandVal(3) + 1); return DAG.getNode(ISD::VSELECT, DL, VecTy, DAG.getConstant(Mask, DL, VecTy, true), Op->getOperand(2), Op->getOperand(1)); @@ -1659,7 +1659,7 @@ SDValue MipsSETargetLowering::lowerINTRINSIC_WO_CHAIN(SDValue Op, if (Op->getConstantOperandVal(3) >= EltTy.getSizeInBits()) report_fatal_error("Immediate out of range"); APInt Mask = APInt::getLowBitsSet(EltTy.getSizeInBits(), - Op->getConstantOperandVal(3)); + Op->getConstantOperandVal(3) + 1); return DAG.getNode(ISD::VSELECT, DL, VecTy, DAG.getConstant(Mask, DL, VecTy, true), Op->getOperand(2), Op->getOperand(1)); |