diff options
| author | Chad Rosier <mcrosier@codeaurora.org> | 2017-04-21 13:37:01 +0000 |
|---|---|---|
| committer | Chad Rosier <mcrosier@codeaurora.org> | 2017-04-21 13:37:01 +0000 |
| commit | bbcc828833c2de9e935e1ed73b45b02ce49a9e20 (patch) | |
| tree | 8221889026c04ab5a5f2fc3e1403bf84d2c6cdbc /llvm/lib/Target | |
| parent | 4f2e9e237fdd575ec0b5c1dd2fb1b7ce2e65aa8e (diff) | |
| download | bcm5719-llvm-bbcc828833c2de9e935e1ed73b45b02ce49a9e20.tar.gz bcm5719-llvm-bbcc828833c2de9e935e1ed73b45b02ce49a9e20.zip | |
[AArch64][Falkor] Fix number of microops for WriteSTIdx missed in r300892.
llvm-svn: 300975
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64SchedFalkor.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SchedFalkor.td b/llvm/lib/Target/AArch64/AArch64SchedFalkor.td index be52ab1003d..cf1c0b66db5 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedFalkor.td +++ b/llvm/lib/Target/AArch64/AArch64SchedFalkor.td @@ -86,7 +86,7 @@ def : WriteRes<WriteSTP, [FalkorUnitST, FalkorUnitSD]> def : WriteRes<WriteAdr, [FalkorUnitXYZ]> { let Latency = 1; } def : WriteRes<WriteLDIdx, [FalkorUnitLD]> { let Latency = 5; } def : WriteRes<WriteSTIdx, [FalkorUnitST, FalkorUnitSD]> - { let Latency = 0; let NumMicroOps = 3; } + { let Latency = 0; let NumMicroOps = 2; } def : WriteRes<WriteF, [FalkorUnitVXVY, FalkorUnitVXVY]> { let Latency = 3; let NumMicroOps = 2; } def : WriteRes<WriteFCmp, [FalkorUnitVXVY]> { let Latency = 2; } |
