diff options
author | Matthias Braun <matze@braunis.de> | 2017-10-12 22:57:28 +0000 |
---|---|---|
committer | Matthias Braun <matze@braunis.de> | 2017-10-12 22:57:28 +0000 |
commit | bb8507e63c42212c3753c0df069ec16a52652247 (patch) | |
tree | 8579aed34d69ff21da87b58f3376ad5f5282966f /llvm/lib/Target | |
parent | a2f9e3a60fb97bf82a1029207ee81221fe13b3d5 (diff) | |
download | bcm5719-llvm-bb8507e63c42212c3753c0df069ec16a52652247.tar.gz bcm5719-llvm-bb8507e63c42212c3753c0df069ec16a52652247.zip |
Revert "TargetMachine: Merge TargetMachine and LLVMTargetMachine"
Reverting to investigate layering effects of MCJIT not linking
libCodeGen but using TargetMachine::getNameWithPrefix() breaking the
lldb bots.
This reverts commit r315633.
llvm-svn: 315637
Diffstat (limited to 'llvm/lib/Target')
42 files changed, 546 insertions, 72 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp index 882065edab4..1762475ac93 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp +++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.cpp @@ -237,9 +237,10 @@ AArch64TargetMachine::AArch64TargetMachine(const Target &T, const Triple &TT, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool LittleEndian) - : TargetMachine(T, computeDataLayout(TT, Options.MCOptions, LittleEndian), - TT, CPU, FS, Options, getEffectiveRelocModel(TT, RM), - getEffectiveCodeModel(TT, CM, JIT), OL), + : LLVMTargetMachine(T, + computeDataLayout(TT, Options.MCOptions, LittleEndian), + TT, CPU, FS, Options, getEffectiveRelocModel(TT, RM), + getEffectiveCodeModel(TT, CM, JIT), OL), TLOF(createTLOF(getTargetTriple())), isLittle(LittleEndian) { initAsmInfo(); } diff --git a/llvm/lib/Target/AArch64/AArch64TargetMachine.h b/llvm/lib/Target/AArch64/AArch64TargetMachine.h index fb41e3c9645..2bbfb2da3db 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetMachine.h +++ b/llvm/lib/Target/AArch64/AArch64TargetMachine.h @@ -23,7 +23,7 @@ namespace llvm { class AArch64RegisterBankInfo; -class AArch64TargetMachine : public TargetMachine { +class AArch64TargetMachine : public LLVMTargetMachine { protected: std::unique_ptr<TargetLoweringObjectFile> TLOF; mutable StringMap<std::unique_ptr<AArch64Subtarget>> SubtargetMap; diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index 54d43d403c5..f20dba844d3 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -290,9 +290,9 @@ AMDGPUTargetMachine::AMDGPUTargetMachine(const Target &T, const Triple &TT, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OptLevel) - : TargetMachine(T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU), - FS, Options, getEffectiveRelocModel(RM), - getEffectiveCodeModel(CM), OptLevel), + : LLVMTargetMachine(T, computeDataLayout(TT), TT, getGPUOrDefault(TT, CPU), + FS, Options, getEffectiveRelocModel(RM), + getEffectiveCodeModel(CM), OptLevel), TLOF(createTLOF(getTargetTriple())) { AS = AMDGPU::getAMDGPUAS(TT); initAsmInfo(); @@ -471,7 +471,7 @@ namespace { class AMDGPUPassConfig : public TargetPassConfig { public: - AMDGPUPassConfig(TargetMachine &TM, PassManagerBase &PM) + AMDGPUPassConfig(LLVMTargetMachine &TM, PassManagerBase &PM) : TargetPassConfig(TM, PM) { // Exceptions and StackMaps are not supported, so these passes will never do // anything. @@ -502,7 +502,7 @@ public: class R600PassConfig final : public AMDGPUPassConfig { public: - R600PassConfig(TargetMachine &TM, PassManagerBase &PM) + R600PassConfig(LLVMTargetMachine &TM, PassManagerBase &PM) : AMDGPUPassConfig(TM, PM) {} ScheduleDAGInstrs *createMachineScheduler( @@ -519,7 +519,7 @@ public: class GCNPassConfig final : public AMDGPUPassConfig { public: - GCNPassConfig(TargetMachine &TM, PassManagerBase &PM) + GCNPassConfig(LLVMTargetMachine &TM, PassManagerBase &PM) : AMDGPUPassConfig(TM, PM) { // It is necessary to know the register usage of the entire call graph. We // allow calls without EnableAMDGPUFunctionCalls if they are marked diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h index 770c0977bdb..34114bf73bc 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.h @@ -31,7 +31,7 @@ namespace llvm { // AMDGPU Target Machine (R600+) //===----------------------------------------------------------------------===// -class AMDGPUTargetMachine : public TargetMachine { +class AMDGPUTargetMachine : public LLVMTargetMachine { protected: std::unique_ptr<TargetLoweringObjectFile> TLOF; AMDGPUIntrinsicInfo IntrinsicInfo; diff --git a/llvm/lib/Target/ARC/ARCTargetMachine.cpp b/llvm/lib/Target/ARC/ARCTargetMachine.cpp index 65f3ce0e45d..d2512c281a6 100644 --- a/llvm/lib/Target/ARC/ARCTargetMachine.cpp +++ b/llvm/lib/Target/ARC/ARCTargetMachine.cpp @@ -39,10 +39,11 @@ ARCTargetMachine::ARCTargetMachine(const Target &T, const Triple &TT, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) - : TargetMachine(T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" - "f32:32:32-i64:32-f64:32-a:0:32-n32", - TT, CPU, FS, Options, getRelocModel(RM), - getEffectiveCodeModel(CM), OL), + : LLVMTargetMachine(T, + "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i32:32:32-" + "f32:32:32-i64:32-f64:32-a:0:32-n32", + TT, CPU, FS, Options, getRelocModel(RM), + getEffectiveCodeModel(CM), OL), TLOF(make_unique<TargetLoweringObjectFileELF>()), Subtarget(TT, CPU, FS, *this) { initAsmInfo(); diff --git a/llvm/lib/Target/ARC/ARCTargetMachine.h b/llvm/lib/Target/ARC/ARCTargetMachine.h index df911b537b8..98021b3dc1d 100644 --- a/llvm/lib/Target/ARC/ARCTargetMachine.h +++ b/llvm/lib/Target/ARC/ARCTargetMachine.h @@ -21,7 +21,7 @@ namespace llvm { class TargetPassConfig; -class ARCTargetMachine : public TargetMachine { +class ARCTargetMachine : public LLVMTargetMachine { std::unique_ptr<TargetLoweringObjectFile> TLOF; ARCSubtarget Subtarget; diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.cpp b/llvm/lib/Target/ARM/ARMTargetMachine.cpp index bc8f299db56..9a191e42247 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.cpp +++ b/llvm/lib/Target/ARM/ARMTargetMachine.cpp @@ -205,9 +205,9 @@ ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T, const Triple &TT, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool isLittle) - : TargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, - CPU, FS, Options, getEffectiveRelocModel(TT, RM), - getEffectiveCodeModel(CM), OL), + : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, + CPU, FS, Options, getEffectiveRelocModel(TT, RM), + getEffectiveCodeModel(CM), OL), TargetABI(computeTargetABI(TT, CPU, Options)), TLOF(createTLOF(getTargetTriple())), isLittle(isLittle) { diff --git a/llvm/lib/Target/ARM/ARMTargetMachine.h b/llvm/lib/Target/ARM/ARMTargetMachine.h index dcd4f68b644..655ec3202bf 100644 --- a/llvm/lib/Target/ARM/ARMTargetMachine.h +++ b/llvm/lib/Target/ARM/ARMTargetMachine.h @@ -25,7 +25,7 @@ namespace llvm { -class ARMBaseTargetMachine : public TargetMachine { +class ARMBaseTargetMachine : public LLVMTargetMachine { public: enum ARMABI { ARM_ABI_UNKNOWN, diff --git a/llvm/lib/Target/AVR/AVRTargetMachine.cpp b/llvm/lib/Target/AVR/AVRTargetMachine.cpp index 1fbabe00606..f9a738b2182 100644 --- a/llvm/lib/Target/AVR/AVRTargetMachine.cpp +++ b/llvm/lib/Target/AVR/AVRTargetMachine.cpp @@ -52,8 +52,9 @@ AVRTargetMachine::AVRTargetMachine(const Target &T, const Triple &TT, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) - : TargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options, - getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), OL), + : LLVMTargetMachine(T, AVRDataLayout, TT, getCPU(CPU), FS, Options, + getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), + OL), SubTarget(TT, getCPU(CPU), FS, *this) { this->TLOF = make_unique<AVRTargetObjectFile>(); initAsmInfo(); diff --git a/llvm/lib/Target/AVR/AVRTargetMachine.h b/llvm/lib/Target/AVR/AVRTargetMachine.h index 123ee31fdb9..ffcf4350d45 100644 --- a/llvm/lib/Target/AVR/AVRTargetMachine.h +++ b/llvm/lib/Target/AVR/AVRTargetMachine.h @@ -26,11 +26,12 @@ namespace llvm { /// A generic AVR implementation. -class AVRTargetMachine : public TargetMachine { +class AVRTargetMachine : public LLVMTargetMachine { public: AVRTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, - Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, + Optional<Reloc::Model> RM, + Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT); const AVRSubtarget *getSubtargetImpl() const; diff --git a/llvm/lib/Target/BPF/BPFTargetMachine.cpp b/llvm/lib/Target/BPF/BPFTargetMachine.cpp index 7a189bb8561..60672fa2684 100644 --- a/llvm/lib/Target/BPF/BPFTargetMachine.cpp +++ b/llvm/lib/Target/BPF/BPFTargetMachine.cpp @@ -55,8 +55,9 @@ BPFTargetMachine::BPFTargetMachine(const Target &T, const Triple &TT, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) - : TargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, - getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), OL), + : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, + getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), + OL), TLOF(make_unique<TargetLoweringObjectFileELF>()), Subtarget(TT, CPU, FS, *this) { initAsmInfo(); diff --git a/llvm/lib/Target/BPF/BPFTargetMachine.h b/llvm/lib/Target/BPF/BPFTargetMachine.h index 746d7886a04..a560dd27335 100644 --- a/llvm/lib/Target/BPF/BPFTargetMachine.h +++ b/llvm/lib/Target/BPF/BPFTargetMachine.h @@ -18,7 +18,7 @@ #include "llvm/Target/TargetMachine.h" namespace llvm { -class BPFTargetMachine : public TargetMachine { +class BPFTargetMachine : public LLVMTargetMachine { std::unique_ptr<TargetLoweringObjectFile> TLOF; BPFSubtarget Subtarget; diff --git a/llvm/lib/Target/CMakeLists.txt b/llvm/lib/Target/CMakeLists.txt index c56e04e1a20..1e6abfacb79 100644 --- a/llvm/lib/Target/CMakeLists.txt +++ b/llvm/lib/Target/CMakeLists.txt @@ -6,6 +6,8 @@ add_llvm_library(LLVMTarget Target.cpp TargetIntrinsicInfo.cpp TargetLoweringObjectFile.cpp + TargetMachine.cpp + TargetMachineC.cpp ADDITIONAL_HEADER_DIRS ${LLVM_MAIN_INCLUDE_DIR}/llvm/Target diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp index 33439a78cb5..7b2774f8c40 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp +++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.cpp @@ -194,7 +194,7 @@ HexagonTargetMachine::HexagonTargetMachine(const Target &T, const Triple &TT, // Specify the vector alignment explicitly. For v512x1, the calculated // alignment would be 512*alignment(i1), which is 512 bytes, instead of // the required minimum of 64 bytes. - : TargetMachine( + : LLVMTargetMachine( T, "e-m:e-p:32:32:32-a:0-n16:32-" "i64:64:64-i32:32:32-i16:16:16-i1:8:8-f32:32:32-f64:64:64-" diff --git a/llvm/lib/Target/Hexagon/HexagonTargetMachine.h b/llvm/lib/Target/Hexagon/HexagonTargetMachine.h index f9160669949..acd41f920b5 100644 --- a/llvm/lib/Target/Hexagon/HexagonTargetMachine.h +++ b/llvm/lib/Target/Hexagon/HexagonTargetMachine.h @@ -23,7 +23,7 @@ namespace llvm { class Module; -class HexagonTargetMachine : public TargetMachine { +class HexagonTargetMachine : public LLVMTargetMachine { std::unique_ptr<TargetLoweringObjectFile> TLOF; mutable StringMap<std::unique_ptr<HexagonSubtarget>> SubtargetMap; diff --git a/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp b/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp index ec358e9495e..9a73c95d651 100644 --- a/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp +++ b/llvm/lib/Target/Lanai/LanaiTargetMachine.cpp @@ -65,9 +65,9 @@ LanaiTargetMachine::LanaiTargetMachine(const Target &T, const Triple &TT, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CodeModel, CodeGenOpt::Level OptLevel, bool JIT) - : TargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options, - getEffectiveRelocModel(RM), - getEffectiveCodeModel(CodeModel), OptLevel), + : LLVMTargetMachine(T, computeDataLayout(), TT, Cpu, FeatureString, Options, + getEffectiveRelocModel(RM), + getEffectiveCodeModel(CodeModel), OptLevel), Subtarget(TT, Cpu, FeatureString, *this, Options, getCodeModel(), OptLevel), TLOF(new LanaiTargetObjectFile()) { diff --git a/llvm/lib/Target/Lanai/LanaiTargetMachine.h b/llvm/lib/Target/Lanai/LanaiTargetMachine.h index 5f12bd3c827..ce1271d9dea 100644 --- a/llvm/lib/Target/Lanai/LanaiTargetMachine.h +++ b/llvm/lib/Target/Lanai/LanaiTargetMachine.h @@ -25,7 +25,7 @@ namespace llvm { class formatted_raw_ostream; -class LanaiTargetMachine : public TargetMachine { +class LanaiTargetMachine : public LLVMTargetMachine { LanaiSubtarget Subtarget; std::unique_ptr<TargetLoweringObjectFile> TLOF; diff --git a/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp b/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp index 44f16941d6e..01f44e266d7 100644 --- a/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp +++ b/llvm/lib/Target/MSP430/MSP430TargetMachine.cpp @@ -49,9 +49,9 @@ MSP430TargetMachine::MSP430TargetMachine(const Target &T, const Triple &TT, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) - : TargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS, - Options, getEffectiveRelocModel(RM), - getEffectiveCodeModel(CM), OL), + : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS, + Options, getEffectiveRelocModel(RM), + getEffectiveCodeModel(CM), OL), TLOF(make_unique<TargetLoweringObjectFileELF>()), Subtarget(TT, CPU, FS, *this) { initAsmInfo(); diff --git a/llvm/lib/Target/MSP430/MSP430TargetMachine.h b/llvm/lib/Target/MSP430/MSP430TargetMachine.h index bd32004b980..97b5e810a1d 100644 --- a/llvm/lib/Target/MSP430/MSP430TargetMachine.h +++ b/llvm/lib/Target/MSP430/MSP430TargetMachine.h @@ -23,7 +23,7 @@ namespace llvm { /// MSP430TargetMachine /// -class MSP430TargetMachine : public TargetMachine { +class MSP430TargetMachine : public LLVMTargetMachine { std::unique_ptr<TargetLoweringObjectFile> TLOF; MSP430Subtarget Subtarget; diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp index 0aa41141b0a..f01a800afc5 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsTargetStreamer.cpp @@ -686,7 +686,7 @@ MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S, MCAssembler &MCA = getStreamer().getAssembler(); // It's possible that MCObjectFileInfo isn't fully initialized at this point - // due to an initialization order problem where TargetMachine creates the + // due to an initialization order problem where LLVMTargetMachine creates the // target streamer before TargetLoweringObjectFile calls // InitializeMCObjectFileInfo. There doesn't seem to be a single place that // covers all cases so this statement covers most cases and direct object diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.cpp b/llvm/lib/Target/Mips/MipsTargetMachine.cpp index 179971bbc19..6199ffd789c 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.cpp +++ b/llvm/lib/Target/Mips/MipsTargetMachine.cpp @@ -109,9 +109,9 @@ MipsTargetMachine::MipsTargetMachine(const Target &T, const Triple &TT, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool isLittle) - : TargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, - CPU, FS, Options, getEffectiveRelocModel(JIT, RM), - getEffectiveCodeModel(CM), OL), + : LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options, isLittle), TT, + CPU, FS, Options, getEffectiveRelocModel(JIT, RM), + getEffectiveCodeModel(CM), OL), isLittle(isLittle), TLOF(llvm::make_unique<MipsTargetObjectFile>()), ABI(MipsABIInfo::computeTargetABI(TT, CPU, Options.MCOptions)), Subtarget(nullptr), DefaultSubtarget(TT, CPU, FS, isLittle, *this, diff --git a/llvm/lib/Target/Mips/MipsTargetMachine.h b/llvm/lib/Target/Mips/MipsTargetMachine.h index 20627c31ffd..ccfc9a938d9 100644 --- a/llvm/lib/Target/Mips/MipsTargetMachine.h +++ b/llvm/lib/Target/Mips/MipsTargetMachine.h @@ -25,7 +25,7 @@ namespace llvm { -class MipsTargetMachine : public TargetMachine { +class MipsTargetMachine : public LLVMTargetMachine { bool isLittle; std::unique_ptr<TargetLoweringObjectFile> TLOF; // Selected ABI diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp index 393d256883b..85f757878f9 100644 --- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp +++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.cpp @@ -100,8 +100,8 @@ NVPTXTargetMachine::NVPTXTargetMachine(const Target &T, const Triple &TT, CodeGenOpt::Level OL, bool is64bit) // The pic relocation model is used regardless of what the client has // specified, as it is the only relocation model currently supported. - : TargetMachine(T, computeDataLayout(is64bit), TT, CPU, FS, Options, - Reloc::PIC_, getEffectiveCodeModel(CM), OL), + : LLVMTargetMachine(T, computeDataLayout(is64bit), TT, CPU, FS, Options, + Reloc::PIC_, getEffectiveCodeModel(CM), OL), is64bit(is64bit), TLOF(llvm::make_unique<NVPTXTargetObjectFile>()), Subtarget(TT, CPU, FS, *this) { if (TT.getOS() == Triple::NVCL) diff --git a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h index 8bea331580a..7674135f0a7 100644 --- a/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h +++ b/llvm/lib/Target/NVPTX/NVPTXTargetMachine.h @@ -24,7 +24,7 @@ namespace llvm { /// NVPTXTargetMachine /// -class NVPTXTargetMachine : public TargetMachine { +class NVPTXTargetMachine : public LLVMTargetMachine { bool is64bit; std::unique_ptr<TargetLoweringObjectFile> TLOF; NVPTX::DrvInterface drvInterface; diff --git a/llvm/lib/Target/Nios2/Nios2TargetMachine.cpp b/llvm/lib/Target/Nios2/Nios2TargetMachine.cpp index 6155d0b6ec8..7370dac2ce3 100644 --- a/llvm/lib/Target/Nios2/Nios2TargetMachine.cpp +++ b/llvm/lib/Target/Nios2/Nios2TargetMachine.cpp @@ -42,8 +42,8 @@ Nios2TargetMachine::Nios2TargetMachine(const Target &T, const Triple &TT, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) - : TargetMachine(T, computeDataLayout(), TT, CPU, FS, Options, - getEffectiveRelocModel(RM), *CM, OL) {} + : LLVMTargetMachine(T, computeDataLayout(), TT, CPU, FS, Options, + getEffectiveRelocModel(RM), *CM, OL) {} Nios2TargetMachine::~Nios2TargetMachine() {} diff --git a/llvm/lib/Target/Nios2/Nios2TargetMachine.h b/llvm/lib/Target/Nios2/Nios2TargetMachine.h index 5412e874969..503187778c1 100644 --- a/llvm/lib/Target/Nios2/Nios2TargetMachine.h +++ b/llvm/lib/Target/Nios2/Nios2TargetMachine.h @@ -18,7 +18,7 @@ #include "llvm/Target/TargetMachine.h" namespace llvm { -class Nios2TargetMachine : public TargetMachine { +class Nios2TargetMachine : public LLVMTargetMachine { mutable StringMap<std::unique_ptr<Nios2Subtarget>> SubtargetMap; public: diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp index eafa877a158..9e146786469 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp +++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.cpp @@ -225,7 +225,7 @@ static CodeModel::Model getEffectiveCodeModel(const Triple &TT, // The FeatureString here is a little subtle. We are modifying the feature // string with what are (currently) non-function specific overrides as it goes -// into the TargetMachine constructor and then using the stored value in the +// into the LLVMTargetMachine constructor and then using the stored value in the // Subtarget constructor below it. PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, @@ -233,10 +233,10 @@ PPCTargetMachine::PPCTargetMachine(const Target &T, const Triple &TT, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) - : TargetMachine(T, getDataLayoutString(TT), TT, CPU, - computeFSAdditions(FS, OL, TT), Options, - getEffectiveRelocModel(TT, RM), - getEffectiveCodeModel(TT, CM, JIT), OL), + : LLVMTargetMachine(T, getDataLayoutString(TT), TT, CPU, + computeFSAdditions(FS, OL, TT), Options, + getEffectiveRelocModel(TT, RM), + getEffectiveCodeModel(TT, CM, JIT), OL), TLOF(createTLOF(getTargetTriple())), TargetABI(computeTargetABI(TT, Options)) { initAsmInfo(); diff --git a/llvm/lib/Target/PowerPC/PPCTargetMachine.h b/llvm/lib/Target/PowerPC/PPCTargetMachine.h index d3be1ee605b..102bf7ca59c 100644 --- a/llvm/lib/Target/PowerPC/PPCTargetMachine.h +++ b/llvm/lib/Target/PowerPC/PPCTargetMachine.h @@ -23,7 +23,7 @@ namespace llvm { /// Common code between 32-bit and 64-bit PowerPC targets. /// -class PPCTargetMachine final : public TargetMachine { +class PPCTargetMachine final : public LLVMTargetMachine { public: enum PPCABI { PPC_ABI_UNKNOWN, PPC_ABI_ELFv1, PPC_ABI_ELFv2 }; private: diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp index aa67c0ee1db..78d9cf53b5d 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.cpp @@ -55,9 +55,9 @@ RISCVTargetMachine::RISCVTargetMachine(const Target &T, const Triple &TT, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) - : TargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, - getEffectiveRelocModel(TT, RM), - getEffectiveCodeModel(CM), OL), + : LLVMTargetMachine(T, computeDataLayout(TT), TT, CPU, FS, Options, + getEffectiveRelocModel(TT, RM), + getEffectiveCodeModel(CM), OL), TLOF(make_unique<TargetLoweringObjectFileELF>()) { initAsmInfo(); } diff --git a/llvm/lib/Target/RISCV/RISCVTargetMachine.h b/llvm/lib/Target/RISCV/RISCVTargetMachine.h index ea245735ae4..5c2ec956ee2 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetMachine.h +++ b/llvm/lib/Target/RISCV/RISCVTargetMachine.h @@ -20,7 +20,7 @@ #include "llvm/Target/TargetMachine.h" namespace llvm { -class RISCVTargetMachine : public TargetMachine { +class RISCVTargetMachine : public LLVMTargetMachine { std::unique_ptr<TargetLoweringObjectFile> TLOF; public: diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp index b3142c43fd5..a0d40653fd9 100644 --- a/llvm/lib/Target/Sparc/SparcTargetMachine.cpp +++ b/llvm/lib/Target/Sparc/SparcTargetMachine.cpp @@ -88,7 +88,7 @@ SparcTargetMachine::SparcTargetMachine( const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT, bool is64bit) - : TargetMachine( + : LLVMTargetMachine( T, computeDataLayout(TT, is64bit), TT, CPU, FS, Options, getEffectiveRelocModel(RM), getEffectiveCodeModel(CM, getEffectiveRelocModel(RM), is64bit, JIT), diff --git a/llvm/lib/Target/Sparc/SparcTargetMachine.h b/llvm/lib/Target/Sparc/SparcTargetMachine.h index 69f8ba796d0..b0d76abeba7 100644 --- a/llvm/lib/Target/Sparc/SparcTargetMachine.h +++ b/llvm/lib/Target/Sparc/SparcTargetMachine.h @@ -20,7 +20,7 @@ namespace llvm { -class SparcTargetMachine : public TargetMachine { +class SparcTargetMachine : public LLVMTargetMachine { std::unique_ptr<TargetLoweringObjectFile> TLOF; SparcSubtarget Subtarget; bool is64Bit; diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp index d3f24c9d9e4..aa76a96413b 100644 --- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp +++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.cpp @@ -143,7 +143,7 @@ SystemZTargetMachine::SystemZTargetMachine(const Target &T, const Triple &TT, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) - : TargetMachine( + : LLVMTargetMachine( T, computeDataLayout(TT, CPU, FS), TT, CPU, FS, Options, getEffectiveRelocModel(RM), getEffectiveCodeModel(CM, getEffectiveRelocModel(RM), JIT), OL), diff --git a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h index 723944dbec1..95ad5e339e0 100644 --- a/llvm/lib/Target/SystemZ/SystemZTargetMachine.h +++ b/llvm/lib/Target/SystemZ/SystemZTargetMachine.h @@ -25,7 +25,7 @@ namespace llvm { -class SystemZTargetMachine : public TargetMachine { +class SystemZTargetMachine : public LLVMTargetMachine { std::unique_ptr<TargetLoweringObjectFile> TLOF; SystemZSubtarget Subtarget; @@ -42,7 +42,7 @@ public: return &Subtarget; } - // Override TargetMachine + // Override LLVMTargetMachine TargetPassConfig *createPassConfig(PassManagerBase &PM) override; TargetIRAnalysis getTargetIRAnalysis() override; diff --git a/llvm/lib/Target/TargetMachine.cpp b/llvm/lib/Target/TargetMachine.cpp new file mode 100644 index 00000000000..3b16dee5a0f --- /dev/null +++ b/llvm/lib/Target/TargetMachine.cpp @@ -0,0 +1,222 @@ +//===-- TargetMachine.cpp - General Target Information ---------------------==// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file describes the general parts of a Target machine. +// +//===----------------------------------------------------------------------===// + +#include "llvm/Target/TargetMachine.h" +#include "llvm/Analysis/TargetTransformInfo.h" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/IR/Function.h" +#include "llvm/IR/GlobalAlias.h" +#include "llvm/IR/GlobalValue.h" +#include "llvm/IR/GlobalVariable.h" +#include "llvm/IR/LegacyPassManager.h" +#include "llvm/IR/Mangler.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCSectionMachO.h" +#include "llvm/MC/MCTargetOptions.h" +#include "llvm/MC/SectionKind.h" +#include "llvm/Target/TargetLowering.h" +#include "llvm/Target/TargetLoweringObjectFile.h" +#include "llvm/Target/TargetSubtargetInfo.h" +using namespace llvm; + +//--------------------------------------------------------------------------- +// TargetMachine Class +// + +TargetMachine::TargetMachine(const Target &T, StringRef DataLayoutString, + const Triple &TT, StringRef CPU, StringRef FS, + const TargetOptions &Options) + : TheTarget(T), DL(DataLayoutString), TargetTriple(TT), TargetCPU(CPU), + TargetFS(FS), AsmInfo(nullptr), MRI(nullptr), MII(nullptr), STI(nullptr), + RequireStructuredCFG(false), DefaultOptions(Options), Options(Options) { +} + +TargetMachine::~TargetMachine() { + delete AsmInfo; + delete MRI; + delete MII; + delete STI; +} + +bool TargetMachine::isPositionIndependent() const { + return getRelocationModel() == Reloc::PIC_; +} + +/// \brief Reset the target options based on the function's attributes. +// FIXME: This function needs to go away for a number of reasons: +// a) global state on the TargetMachine is terrible in general, +// b) these target options should be passed only on the function +// and not on the TargetMachine (via TargetOptions) at all. +void TargetMachine::resetTargetOptions(const Function &F) const { +#define RESET_OPTION(X, Y) \ + do { \ + if (F.hasFnAttribute(Y)) \ + Options.X = (F.getFnAttribute(Y).getValueAsString() == "true"); \ + else \ + Options.X = DefaultOptions.X; \ + } while (0) + + RESET_OPTION(UnsafeFPMath, "unsafe-fp-math"); + RESET_OPTION(NoInfsFPMath, "no-infs-fp-math"); + RESET_OPTION(NoNaNsFPMath, "no-nans-fp-math"); + RESET_OPTION(NoSignedZerosFPMath, "no-signed-zeros-fp-math"); + RESET_OPTION(NoTrappingFPMath, "no-trapping-math"); + + StringRef Denormal = + F.getFnAttribute("denormal-fp-math").getValueAsString(); + if (Denormal == "ieee") + Options.FPDenormalMode = FPDenormal::IEEE; + else if (Denormal == "preserve-sign") + Options.FPDenormalMode = FPDenormal::PreserveSign; + else if (Denormal == "positive-zero") + Options.FPDenormalMode = FPDenormal::PositiveZero; + else + Options.FPDenormalMode = DefaultOptions.FPDenormalMode; +} + +/// Returns the code generation relocation model. The choices are static, PIC, +/// and dynamic-no-pic. +Reloc::Model TargetMachine::getRelocationModel() const { return RM; } + +/// Returns the code model. The choices are small, kernel, medium, large, and +/// target default. +CodeModel::Model TargetMachine::getCodeModel() const { return CMModel; } + +/// Get the IR-specified TLS model for Var. +static TLSModel::Model getSelectedTLSModel(const GlobalValue *GV) { + switch (GV->getThreadLocalMode()) { + case GlobalVariable::NotThreadLocal: + llvm_unreachable("getSelectedTLSModel for non-TLS variable"); + break; + case GlobalVariable::GeneralDynamicTLSModel: + return TLSModel::GeneralDynamic; + case GlobalVariable::LocalDynamicTLSModel: + return TLSModel::LocalDynamic; + case GlobalVariable::InitialExecTLSModel: + return TLSModel::InitialExec; + case GlobalVariable::LocalExecTLSModel: + return TLSModel::LocalExec; + } + llvm_unreachable("invalid TLS model"); +} + +bool TargetMachine::shouldAssumeDSOLocal(const Module &M, + const GlobalValue *GV) const { + Reloc::Model RM = getRelocationModel(); + const Triple &TT = getTargetTriple(); + + // DLLImport explicitly marks the GV as external. + if (GV && GV->hasDLLImportStorageClass()) + return false; + + // Every other GV is local on COFF. + // Make an exception for windows OS in the triple: Some firmwares builds use + // *-win32-macho triples. This (accidentally?) produced windows relocations + // without GOT tables in older clang versions; Keep this behaviour. + if (TT.isOSBinFormatCOFF() || (TT.isOSWindows() && TT.isOSBinFormatMachO())) + return true; + + if (GV && (GV->hasLocalLinkage() || !GV->hasDefaultVisibility())) + return true; + + if (TT.isOSBinFormatMachO()) { + if (RM == Reloc::Static) + return true; + return GV && GV->isStrongDefinitionForLinker(); + } + + assert(TT.isOSBinFormatELF()); + assert(RM != Reloc::DynamicNoPIC); + + bool IsExecutable = + RM == Reloc::Static || M.getPIELevel() != PIELevel::Default; + if (IsExecutable) { + // If the symbol is defined, it cannot be preempted. + if (GV && !GV->isDeclarationForLinker()) + return true; + + bool IsTLS = GV && GV->isThreadLocal(); + bool IsAccessViaCopyRelocs = Options.MCOptions.MCPIECopyRelocations && GV && + isa<GlobalVariable>(GV) && + !GV->hasExternalWeakLinkage(); + Triple::ArchType Arch = TT.getArch(); + bool IsPPC = + Arch == Triple::ppc || Arch == Triple::ppc64 || Arch == Triple::ppc64le; + // Check if we can use copy relocations. PowerPC has no copy relocations. + if (!IsTLS && !IsPPC && (RM == Reloc::Static || IsAccessViaCopyRelocs)) + return true; + } + + // ELF supports preemption of other symbols. + return false; +} + +TLSModel::Model TargetMachine::getTLSModel(const GlobalValue *GV) const { + bool IsPIE = GV->getParent()->getPIELevel() != PIELevel::Default; + Reloc::Model RM = getRelocationModel(); + bool IsSharedLibrary = RM == Reloc::PIC_ && !IsPIE; + bool IsLocal = shouldAssumeDSOLocal(*GV->getParent(), GV); + + TLSModel::Model Model; + if (IsSharedLibrary) { + if (IsLocal) + Model = TLSModel::LocalDynamic; + else + Model = TLSModel::GeneralDynamic; + } else { + if (IsLocal) + Model = TLSModel::LocalExec; + else + Model = TLSModel::InitialExec; + } + + // If the user specified a more specific model, use that. + TLSModel::Model SelectedModel = getSelectedTLSModel(GV); + if (SelectedModel > Model) + return SelectedModel; + + return Model; +} + +/// Returns the optimization level: None, Less, Default, or Aggressive. +CodeGenOpt::Level TargetMachine::getOptLevel() const { return OptLevel; } + +void TargetMachine::setOptLevel(CodeGenOpt::Level Level) { OptLevel = Level; } + +TargetIRAnalysis TargetMachine::getTargetIRAnalysis() { + return TargetIRAnalysis([](const Function &F) { + return TargetTransformInfo(F.getParent()->getDataLayout()); + }); +} + +void TargetMachine::getNameWithPrefix(SmallVectorImpl<char> &Name, + const GlobalValue *GV, Mangler &Mang, + bool MayAlwaysUsePrivate) const { + if (MayAlwaysUsePrivate || !GV->hasPrivateLinkage()) { + // Simple case: If GV is not private, it is not important to find out if + // private labels are legal in this case or not. + Mang.getNameWithPrefix(Name, GV, false); + return; + } + const TargetLoweringObjectFile *TLOF = getObjFileLowering(); + TLOF->getNameWithPrefix(Name, GV, *this); +} + +MCSymbol *TargetMachine::getSymbol(const GlobalValue *GV) const { + const TargetLoweringObjectFile *TLOF = getObjFileLowering(); + SmallString<128> NameStr; + getNameWithPrefix(NameStr, GV, TLOF->getMangler()); + return TLOF->getContext().getOrCreateSymbol(NameStr); +} diff --git a/llvm/lib/Target/TargetMachineC.cpp b/llvm/lib/Target/TargetMachineC.cpp new file mode 100644 index 00000000000..210375ff828 --- /dev/null +++ b/llvm/lib/Target/TargetMachineC.cpp @@ -0,0 +1,244 @@ +//===-- TargetMachine.cpp -------------------------------------------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file implements the LLVM-C part of TargetMachine.h +// +//===----------------------------------------------------------------------===// + +#include "llvm-c/Core.h" +#include "llvm-c/Target.h" +#include "llvm-c/TargetMachine.h" +#include "llvm/Analysis/TargetTransformInfo.h" +#include "llvm/IR/DataLayout.h" +#include "llvm/IR/LegacyPassManager.h" +#include "llvm/IR/Module.h" +#include "llvm/Support/CodeGenCWrappers.h" +#include "llvm/Support/FileSystem.h" +#include "llvm/Support/FormattedStream.h" +#include "llvm/Support/Host.h" +#include "llvm/Support/TargetRegistry.h" +#include "llvm/Support/raw_ostream.h" +#include "llvm/Target/TargetMachine.h" +#include "llvm/Target/TargetSubtargetInfo.h" +#include <cassert> +#include <cstdlib> +#include <cstring> + +using namespace llvm; + +static TargetMachine *unwrap(LLVMTargetMachineRef P) { + return reinterpret_cast<TargetMachine *>(P); +} +static Target *unwrap(LLVMTargetRef P) { + return reinterpret_cast<Target*>(P); +} +static LLVMTargetMachineRef wrap(const TargetMachine *P) { + return reinterpret_cast<LLVMTargetMachineRef>(const_cast<TargetMachine *>(P)); +} +static LLVMTargetRef wrap(const Target * P) { + return reinterpret_cast<LLVMTargetRef>(const_cast<Target*>(P)); +} + +LLVMTargetRef LLVMGetFirstTarget() { + if (TargetRegistry::targets().begin() == TargetRegistry::targets().end()) { + return nullptr; + } + + const Target *target = &*TargetRegistry::targets().begin(); + return wrap(target); +} +LLVMTargetRef LLVMGetNextTarget(LLVMTargetRef T) { + return wrap(unwrap(T)->getNext()); +} + +LLVMTargetRef LLVMGetTargetFromName(const char *Name) { + StringRef NameRef = Name; + auto I = find_if(TargetRegistry::targets(), + [&](const Target &T) { return T.getName() == NameRef; }); + return I != TargetRegistry::targets().end() ? wrap(&*I) : nullptr; +} + +LLVMBool LLVMGetTargetFromTriple(const char* TripleStr, LLVMTargetRef *T, + char **ErrorMessage) { + std::string Error; + + *T = wrap(TargetRegistry::lookupTarget(TripleStr, Error)); + + if (!*T) { + if (ErrorMessage) + *ErrorMessage = strdup(Error.c_str()); + + return 1; + } + + return 0; +} + +const char * LLVMGetTargetName(LLVMTargetRef T) { + return unwrap(T)->getName(); +} + +const char * LLVMGetTargetDescription(LLVMTargetRef T) { + return unwrap(T)->getShortDescription(); +} + +LLVMBool LLVMTargetHasJIT(LLVMTargetRef T) { + return unwrap(T)->hasJIT(); +} + +LLVMBool LLVMTargetHasTargetMachine(LLVMTargetRef T) { + return unwrap(T)->hasTargetMachine(); +} + +LLVMBool LLVMTargetHasAsmBackend(LLVMTargetRef T) { + return unwrap(T)->hasMCAsmBackend(); +} + +LLVMTargetMachineRef LLVMCreateTargetMachine(LLVMTargetRef T, + const char *Triple, const char *CPU, const char *Features, + LLVMCodeGenOptLevel Level, LLVMRelocMode Reloc, + LLVMCodeModel CodeModel) { + Optional<Reloc::Model> RM; + switch (Reloc){ + case LLVMRelocStatic: + RM = Reloc::Static; + break; + case LLVMRelocPIC: + RM = Reloc::PIC_; + break; + case LLVMRelocDynamicNoPic: + RM = Reloc::DynamicNoPIC; + break; + default: + break; + } + + bool JIT; + Optional<CodeModel::Model> CM = unwrap(CodeModel, JIT); + + CodeGenOpt::Level OL; + switch (Level) { + case LLVMCodeGenLevelNone: + OL = CodeGenOpt::None; + break; + case LLVMCodeGenLevelLess: + OL = CodeGenOpt::Less; + break; + case LLVMCodeGenLevelAggressive: + OL = CodeGenOpt::Aggressive; + break; + default: + OL = CodeGenOpt::Default; + break; + } + + TargetOptions opt; + return wrap(unwrap(T)->createTargetMachine(Triple, CPU, Features, opt, RM, CM, + OL, JIT)); +} + +void LLVMDisposeTargetMachine(LLVMTargetMachineRef T) { delete unwrap(T); } + +LLVMTargetRef LLVMGetTargetMachineTarget(LLVMTargetMachineRef T) { + const Target* target = &(unwrap(T)->getTarget()); + return wrap(target); +} + +char* LLVMGetTargetMachineTriple(LLVMTargetMachineRef T) { + std::string StringRep = unwrap(T)->getTargetTriple().str(); + return strdup(StringRep.c_str()); +} + +char* LLVMGetTargetMachineCPU(LLVMTargetMachineRef T) { + std::string StringRep = unwrap(T)->getTargetCPU(); + return strdup(StringRep.c_str()); +} + +char* LLVMGetTargetMachineFeatureString(LLVMTargetMachineRef T) { + std::string StringRep = unwrap(T)->getTargetFeatureString(); + return strdup(StringRep.c_str()); +} + +void LLVMSetTargetMachineAsmVerbosity(LLVMTargetMachineRef T, + LLVMBool VerboseAsm) { + unwrap(T)->Options.MCOptions.AsmVerbose = VerboseAsm; +} + +LLVMTargetDataRef LLVMCreateTargetDataLayout(LLVMTargetMachineRef T) { + return wrap(new DataLayout(unwrap(T)->createDataLayout())); +} + +static LLVMBool LLVMTargetMachineEmit(LLVMTargetMachineRef T, LLVMModuleRef M, + raw_pwrite_stream &OS, + LLVMCodeGenFileType codegen, + char **ErrorMessage) { + TargetMachine* TM = unwrap(T); + Module* Mod = unwrap(M); + + legacy::PassManager pass; + + std::string error; + + Mod->setDataLayout(TM->createDataLayout()); + + TargetMachine::CodeGenFileType ft; + switch (codegen) { + case LLVMAssemblyFile: + ft = TargetMachine::CGFT_AssemblyFile; + break; + default: + ft = TargetMachine::CGFT_ObjectFile; + break; + } + if (TM->addPassesToEmitFile(pass, OS, ft)) { + error = "TargetMachine can't emit a file of this type"; + *ErrorMessage = strdup(error.c_str()); + return true; + } + + pass.run(*Mod); + + OS.flush(); + return false; +} + +LLVMBool LLVMTargetMachineEmitToFile(LLVMTargetMachineRef T, LLVMModuleRef M, + char* Filename, LLVMCodeGenFileType codegen, char** ErrorMessage) { + std::error_code EC; + raw_fd_ostream dest(Filename, EC, sys::fs::F_None); + if (EC) { + *ErrorMessage = strdup(EC.message().c_str()); + return true; + } + bool Result = LLVMTargetMachineEmit(T, M, dest, codegen, ErrorMessage); + dest.flush(); + return Result; +} + +LLVMBool LLVMTargetMachineEmitToMemoryBuffer(LLVMTargetMachineRef T, + LLVMModuleRef M, LLVMCodeGenFileType codegen, char** ErrorMessage, + LLVMMemoryBufferRef *OutMemBuf) { + SmallString<0> CodeString; + raw_svector_ostream OStream(CodeString); + bool Result = LLVMTargetMachineEmit(T, M, OStream, codegen, ErrorMessage); + + StringRef Data = OStream.str(); + *OutMemBuf = + LLVMCreateMemoryBufferWithMemoryRangeCopy(Data.data(), Data.size(), ""); + return Result; +} + +char *LLVMGetDefaultTargetTriple(void) { + return strdup(sys::getDefaultTargetTriple().c_str()); +} + +void LLVMAddAnalysisPasses(LLVMTargetMachineRef T, LLVMPassManagerRef PM) { + unwrap(PM)->add( + createTargetTransformInfoWrapperPass(unwrap(T)->getTargetIRAnalysis())); +} diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp index ad779c1b771..8ad74d9db7b 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.cpp @@ -69,10 +69,11 @@ WebAssemblyTargetMachine::WebAssemblyTargetMachine( const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) - : TargetMachine(T, TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128" - : "e-m:e-p:32:32-i64:64-n32:64-S128", - TT, CPU, FS, Options, getEffectiveRelocModel(RM), - CM ? *CM : CodeModel::Large, OL), + : LLVMTargetMachine(T, + TT.isArch64Bit() ? "e-m:e-p:64:64-i64:64-n32:64-S128" + : "e-m:e-p:32:32-i64:64-n32:64-S128", + TT, CPU, FS, Options, getEffectiveRelocModel(RM), + CM ? *CM : CodeModel::Large, OL), TLOF(TT.isOSBinFormatELF() ? static_cast<TargetLoweringObjectFile*>( new WebAssemblyTargetObjectFileELF()) : diff --git a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h index 4bb7fb00f7b..22484952651 100644 --- a/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h +++ b/llvm/lib/Target/WebAssembly/WebAssemblyTargetMachine.h @@ -21,7 +21,7 @@ namespace llvm { -class WebAssemblyTargetMachine final : public TargetMachine { +class WebAssemblyTargetMachine final : public LLVMTargetMachine { std::unique_ptr<TargetLoweringObjectFile> TLOF; mutable StringMap<std::unique_ptr<WebAssemblySubtarget>> SubtargetMap; diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp index b4ab8779672..51ae377986d 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.cpp +++ b/llvm/lib/Target/X86/X86TargetMachine.cpp @@ -200,7 +200,7 @@ X86TargetMachine::X86TargetMachine(const Target &T, const Triple &TT, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) - : TargetMachine( + : LLVMTargetMachine( T, computeDataLayout(TT), TT, CPU, FS, Options, getEffectiveRelocModel(TT, RM), getEffectiveCodeModel(CM, JIT, TT.getArch() == Triple::x86_64), OL), diff --git a/llvm/lib/Target/X86/X86TargetMachine.h b/llvm/lib/Target/X86/X86TargetMachine.h index 25a51ffb4c1..952bd1321ff 100644 --- a/llvm/lib/Target/X86/X86TargetMachine.h +++ b/llvm/lib/Target/X86/X86TargetMachine.h @@ -28,7 +28,7 @@ class StringRef; class X86Subtarget; class X86RegisterBankInfo; -class X86TargetMachine final : public TargetMachine { +class X86TargetMachine final : public LLVMTargetMachine { std::unique_ptr<TargetLoweringObjectFile> TLOF; mutable StringMap<std::unique_ptr<X86Subtarget>> SubtargetMap; diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp index 2e932b95467..3aa7187e0cd 100644 --- a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp +++ b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp @@ -48,7 +48,7 @@ XCoreTargetMachine::XCoreTargetMachine(const Target &T, const Triple &TT, Optional<Reloc::Model> RM, Optional<CodeModel::Model> CM, CodeGenOpt::Level OL, bool JIT) - : TargetMachine( + : LLVMTargetMachine( T, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32", TT, CPU, FS, Options, getEffectiveRelocModel(RM), getEffectiveCodeModel(CM), OL), diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.h b/llvm/lib/Target/XCore/XCoreTargetMachine.h index 8e6dde512e9..5baa3524d2a 100644 --- a/llvm/lib/Target/XCore/XCoreTargetMachine.h +++ b/llvm/lib/Target/XCore/XCoreTargetMachine.h @@ -24,7 +24,7 @@ namespace llvm { -class XCoreTargetMachine : public TargetMachine { +class XCoreTargetMachine : public LLVMTargetMachine { std::unique_ptr<TargetLoweringObjectFile> TLOF; XCoreSubtarget Subtarget; |