diff options
| author | David Green <david.green@arm.com> | 2019-07-05 09:34:30 +0000 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2019-07-05 09:34:30 +0000 |
| commit | bb7e97d783efae225c97758f2ff186436ac8d86d (patch) | |
| tree | 067450acb87d49989f1184d2fac9e9550406748c /llvm/lib/Target | |
| parent | 6fa850c4fe4112af7590a548e2e5ec4a641c6c44 (diff) | |
| download | bcm5719-llvm-bb7e97d783efae225c97758f2ff186436ac8d86d.tar.gz bcm5719-llvm-bb7e97d783efae225c97758f2ff186436ac8d86d.zip | |
[ARM] MVE fp to int conversions
This adds the patterns needed for fptosi and sitofp.
Differential Revision: https://reviews.llvm.org/D63729
llvm-svn: 365176
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMISelLowering.cpp | 7 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstrMVE.td | 19 |
2 files changed, 26 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp index ea8e84d0afa..ee760eb17a6 100644 --- a/llvm/lib/Target/ARM/ARMISelLowering.cpp +++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp @@ -256,6 +256,13 @@ void ARMTargetLowering::addMVEVectorTypes(bool HasMVEFP) { setOperationAction(ISD::SDIV, VT, Expand); setOperationAction(ISD::UREM, VT, Expand); setOperationAction(ISD::SREM, VT, Expand); + + if (!HasMVEFP) { + setOperationAction(ISD::SINT_TO_FP, VT, Expand); + setOperationAction(ISD::UINT_TO_FP, VT, Expand); + setOperationAction(ISD::FP_TO_SINT, VT, Expand); + setOperationAction(ISD::FP_TO_UINT, VT, Expand); + } } const MVT FloatTypes[] = { MVT::v8f16, MVT::v4f32 }; diff --git a/llvm/lib/Target/ARM/ARMInstrMVE.td b/llvm/lib/Target/ARM/ARMInstrMVE.td index e997bae21df..49ce1dde8b8 100644 --- a/llvm/lib/Target/ARM/ARMInstrMVE.td +++ b/llvm/lib/Target/ARM/ARMInstrMVE.td @@ -2546,6 +2546,25 @@ def MVE_VCVTf16u16n : MVE_VCVT_fp_int<"f16.u16", 0b01, 0b01>; def MVE_VCVTf32s32n : MVE_VCVT_fp_int<"f32.s32", 0b10, 0b00>; def MVE_VCVTf32u32n : MVE_VCVT_fp_int<"f32.u32", 0b10, 0b01>; +let Predicates = [HasMVEFloat] in { +def : Pat<(v4i32 (fp_to_sint (v4f32 MQPR:$src))), + (v4i32 (MVE_VCVTs32f32z (v4f32 MQPR:$src)))>; +def : Pat<(v4i32 (fp_to_uint (v4f32 MQPR:$src))), + (v4i32 (MVE_VCVTu32f32z (v4f32 MQPR:$src)))>; +def : Pat<(v8i16 (fp_to_sint (v8f16 MQPR:$src))), + (v8i16 (MVE_VCVTs16f16z (v8f16 MQPR:$src)))>; +def : Pat<(v8i16 (fp_to_uint (v8f16 MQPR:$src))), + (v8i16 (MVE_VCVTu16f16z (v8f16 MQPR:$src)))>; +def : Pat<(v4f32 (sint_to_fp (v4i32 MQPR:$src))), + (v4f32 (MVE_VCVTf32s32n (v4i32 MQPR:$src)))>; +def : Pat<(v4f32 (uint_to_fp (v4i32 MQPR:$src))), + (v4f32 (MVE_VCVTf32u32n (v4i32 MQPR:$src)))>; +def : Pat<(v8f16 (sint_to_fp (v8i16 MQPR:$src))), + (v8f16 (MVE_VCVTf16s16n (v8i16 MQPR:$src)))>; +def : Pat<(v8f16 (uint_to_fp (v8i16 MQPR:$src))), + (v8f16 (MVE_VCVTf16u16n (v8i16 MQPR:$src)))>; +} + class MVE_VABSNEG_fp<string iname, string suffix, bits<2> size, bit negate, list<dag> pattern=[]> : MVE_float<iname, suffix, (outs MQPR:$Qd), |
