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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-04-02 16:20:34 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-04-02 16:20:34 +0000 |
| commit | ba28263b03b0f13045098122af974c21e20b2aab (patch) | |
| tree | 76342ed3e3278865c55d5dc84da04fbc7a2ab2ea /llvm/lib/Target | |
| parent | e56a2d7b4c115cfc451b3c3da9bdcc58405860b1 (diff) | |
| download | bcm5719-llvm-ba28263b03b0f13045098122af974c21e20b2aab.tar.gz bcm5719-llvm-ba28263b03b0f13045098122af974c21e20b2aab.zip | |
[X86][MMX] Simplify tablegen patterns by always combining MOVDQ2Q from v2i64
llvm-svn: 299336
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 7eecd2410fe..567eae52236 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -28965,7 +28965,8 @@ static SDValue combineBitcast(SDNode *N, SelectionDAG &DAG, isNullConstant(N0.getOperand(1))) { SDValue N00 = N0->getOperand(0); if (N00.getValueType().is128BitVector()) - return DAG.getNode(X86ISD::MOVDQ2Q, SDLoc(N00), VT, N00); + return DAG.getNode(X86ISD::MOVDQ2Q, SDLoc(N00), VT, + DAG.getBitcast(MVT::v2i64, N00)); } // Convert a bitcasted integer logic operation that has one bitcasted |
