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author | Cameron Zwarich <zwarich@apple.com> | 2011-05-18 23:03:10 +0000 |
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committer | Cameron Zwarich <zwarich@apple.com> | 2011-05-18 23:03:10 +0000 |
commit | b9bef106c665536c1429982d375cb2d9f7617605 (patch) | |
tree | f1f968d55a32a6cfe3d84be32af9c1e1e267a07f /llvm/lib/Target | |
parent | 30243c74c0ebf703410161faf7c6e9374119c00e (diff) | |
download | bcm5719-llvm-b9bef106c665536c1429982d375cb2d9f7617605.tar.gz bcm5719-llvm-b9bef106c665536c1429982d375cb2d9f7617605.zip |
Add missing mayLoad / mayStore flags to instruction definitions without patterns,
which fixes all of the CodeGen/MBlaze verifier failures.
llvm-svn: 131595
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/MBlaze/MBlazeInstrInfo.td | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/llvm/lib/Target/MBlaze/MBlazeInstrInfo.td b/llvm/lib/Target/MBlaze/MBlazeInstrInfo.td index 896e8eae163..950f2d77029 100644 --- a/llvm/lib/Target/MBlaze/MBlazeInstrInfo.td +++ b/llvm/lib/Target/MBlaze/MBlazeInstrInfo.td @@ -245,20 +245,25 @@ class PatCmp<bits<6> op, bits<11> flags, string instr_asm> : //===----------------------------------------------------------------------===// // Memory Access Instructions //===----------------------------------------------------------------------===// + +let mayLoad = 1 in { class LoadM<bits<6> op, bits<11> flags, string instr_asm> : TA<op, flags, (outs GPR:$dst), (ins memrr:$addr), !strconcat(instr_asm, " $dst, $addr"), [], IIC_MEMl>; +} class LoadMI<bits<6> op, string instr_asm, PatFrag OpNode> : TB<op, (outs GPR:$dst), (ins memri:$addr), !strconcat(instr_asm, " $dst, $addr"), [(set (i32 GPR:$dst), (OpNode iaddr:$addr))], IIC_MEMl>; +let mayStore = 1 in { class StoreM<bits<6> op, bits<11> flags, string instr_asm> : TA<op, flags, (outs), (ins GPR:$dst, memrr:$addr), !strconcat(instr_asm, " $dst, $addr"), [], IIC_MEMs>; +} class StoreMI<bits<6> op, string instr_asm, PatFrag OpNode> : TB<op, (outs), (ins GPR:$dst, memri:$addr), |