Revert "[AArch64] Coalesce Copy Zero during instruction selection"

This reverts commit d8f57105010cc7e78026e511d5def873fc91e0e7.

Original Commit:

Author: Haicheng Wu <haicheng@codeaurora.org>
Date:   Sun Feb 18 13:51:33 2018 +0000

    [AArch64] Coalesce Copy Zero during instruction selection

    Add special case for copy of zero to avoid a double copy.

    Differential Revision: https://reviews.llvm.org/D36104

Author's intention is to remove a BB that has one mov instruction. In
order to do that, d8f571050 pessmizes MachineSinking by introducing a
copy, such that mov instruction is NOT moved to the BB. Optimization
downstream gets rid of the BB with only mov instruction. This works well
if we have only one fall through branch as there is only one "extra"
mov instruction.

If we have multiple fall throughs, we will have a lot of redundant movs.
In such a case, it's better to have this BB which has one mov instruction.

This is causing degradation in jpeg, fft and other codebases. I believe
if we want to remove a BB with only one branch instruction, we should not
pessimize Machine Sinking at all, and find some other solution.

llvm-svn: 335251

1 files changed, 1 insertions, 29 deletions

diff --git a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
index 3c46ec52d32..c1a9ee333b6 100644
--- a/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
@@ -2892,35 +2892,7 @@ void AArch64DAGToDAGISel::Select(SDNode *Node) {
     }
     break;
   }
-  case ISD::CopyToReg: {
-    // Special case for copy of zero to avoid a double copy.
-    SDNode *CopyVal = Node->getOperand(2).getNode();
-    ConstantSDNode *CopyValConst = dyn_cast<ConstantSDNode>(CopyVal);
-    if (!CopyValConst || !CopyValConst->isNullValue())
-      break;
-    const SDValue &Dest = Node->getOperand(1);
-    if (!TargetRegisterInfo::isVirtualRegister(
-            cast<RegisterSDNode>(Dest)->getReg()))
-      break;
-    unsigned ZeroReg;
-    EVT ZeroVT = CopyValConst->getValueType(0);
-    if (ZeroVT == MVT::i32)
-      ZeroReg = AArch64::WZR;
-    else if (ZeroVT == MVT::i64)
-      ZeroReg = AArch64::XZR;
-    else
-      break;
-    unsigned NumOperands = Node->getNumOperands();
-    SDValue ZeroRegVal = CurDAG->getRegister(ZeroReg, ZeroVT);
-    // Replace the source operand (#0) with ZeroRegVal.
-    SDValue Ops[] = {Node->getOperand(0), Node->getOperand(1), ZeroRegVal,
-                     (NumOperands == 4) ? Node->getOperand(3) : SDValue()};
-    SDValue New =
-        CurDAG->getNode(ISD::CopyToReg, SDLoc(Node), Node->getVTList(),
-                        makeArrayRef(Ops, NumOperands));
-    ReplaceNode(Node, New.getNode());
-    return;
-  }
+
   case ISD::FrameIndex: {
     // Selects to ADDXri FI, 0 which in turn will become ADDXri SP, imm.
     int FI = cast<FrameIndexSDNode>(Node)->getIndex();