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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-07-09 23:34:29 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-07-09 23:34:29 +0000 |
| commit | b1843e130ad9c4269ece5d08718b33566a41d919 (patch) | |
| tree | 2c6ba4df2752cccf714cdfc8c17a4b4e72d8f0cb /llvm/lib/Target | |
| parent | 27cf6664437efd640bb6db5594bafcce68fa2854 (diff) | |
| download | bcm5719-llvm-b1843e130ad9c4269ece5d08718b33566a41d919.tar.gz bcm5719-llvm-b1843e130ad9c4269ece5d08718b33566a41d919.zip | |
GlobalISel: Implement lower for G_FCOPYSIGN
In SelectionDAG AMDGPU treated these as legal, but this was mostly
because the bitcasts required for FP types were painful. Theoretically
the bitpattern should eventually match to bfi, so don't bother trying
to get the patterns to import.
llvm-svn: 365583
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index 410d038fc65..f33fe2e128d 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -298,9 +298,8 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_, .lowerFor({{S64, S16}}) // FIXME: Implement .scalarize(0); - getActionDefinitionsBuilder(G_FCOPYSIGN) - .legalForCartesianProduct({S16, S32, S64}, {S16, S32, S64}) - .scalarize(0); + // TODO: Verify V_BFI_B32 is generated from expanded bit ops. + getActionDefinitionsBuilder(G_FCOPYSIGN).lower(); getActionDefinitionsBuilder(G_FSUB) // Use actual fsub instruction |
