Revert r336950 and r336951 "[X86] Add AVX512 equivalents of some isel patterns so we get EVEX instructions." and "foo"

One of them had a bad title and they should have been squashed.

llvm-svn: 336953

2 files changed, 17 insertions, 48 deletions

diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index c703e610715..20a7dbd5c38 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -11484,13 +11484,13 @@ multiclass AVX512_scalar_math_fp_patterns<SDNode Op, string OpcPrefix, SDNode Mo
     def : Pat<(_.VT (MoveNode (_.VT VR128X:$dst), (_.VT (scalar_to_vector
           (Op (_.EltVT (extractelt (_.VT VR128X:$dst), (iPTR 0))),
           _.FRC:$src))))),
-      (!cast<Instruction>("V"#OpcPrefix#Zrr_Int) _.VT:$dst,
+      (!cast<I>("V"#OpcPrefix#Zrr_Int) _.VT:$dst,
           (COPY_TO_REGCLASS _.FRC:$src, VR128X))>;
 
     // vector math op with insert via movss
     def : Pat<(_.VT (MoveNode (_.VT VR128X:$dst),
           (Op (_.VT VR128X:$dst), (_.VT VR128X:$src)))),
-      (!cast<Instruction>("V"#OpcPrefix#Zrr_Int) _.VT:$dst, _.VT:$src)>;
+      (!cast<I>("V"#OpcPrefix#Zrr_Int) _.VT:$dst, _.VT:$src)>;
 
     // extracted masked scalar math op with insert via movss
     def : Pat<(MoveNode (_.VT VR128X:$src1),
@@ -11499,17 +11499,17 @@ multiclass AVX512_scalar_math_fp_patterns<SDNode Op, string OpcPrefix, SDNode Mo
                             (Op (_.EltVT (extractelt (_.VT VR128X:$src1), (iPTR 0))),
                                 _.FRC:$src2),
                             _.FRC:$src0))),
-      (!cast<Instruction>("V"#OpcPrefix#Zrr_Intk) (COPY_TO_REGCLASS _.FRC:$src0, VR128X),
+      (!cast<I>("V"#OpcPrefix#Zrr_Intk) (COPY_TO_REGCLASS _.FRC:$src0, VR128X),
           VK1WM:$mask, _.VT:$src1,
           (COPY_TO_REGCLASS _.FRC:$src2, VR128X))>;
-
+    
     // extracted masked scalar math op with insert via movss
     def : Pat<(MoveNode (_.VT VR128X:$src1),
                (scalar_to_vector
                 (X86selects VK1WM:$mask,
                             (Op (_.EltVT (extractelt (_.VT VR128X:$src1), (iPTR 0))),
                                 _.FRC:$src2), (_.EltVT ZeroFP)))),
-      (!cast<Instruction>("V"#OpcPrefix#Zrr_Intkz) 
+      (!cast<I>("V"#OpcPrefix#Zrr_Intkz) 
           VK1WM:$mask, _.VT:$src1,
           (COPY_TO_REGCLASS _.FRC:$src2, VR128X))>;
   }
@@ -11525,37 +11525,6 @@ defm : AVX512_scalar_math_fp_patterns<fsub, "SUBSD", X86Movsd, v2f64x_info, fp64
 defm : AVX512_scalar_math_fp_patterns<fmul, "MULSD", X86Movsd, v2f64x_info, fp64imm0>;
 defm : AVX512_scalar_math_fp_patterns<fdiv, "DIVSD", X86Movsd, v2f64x_info, fp64imm0>;
 
-multiclass AVX512_scalar_unary_math_patterns<SDNode OpNode, string OpcPrefix,
-                                             SDNode Move, X86VectorVTInfo _> {
-  let Predicates = [HasAVX512] in {
-    def : Pat<(_.VT (Move _.VT:$dst,
-                     (scalar_to_vector (OpNode (extractelt _.VT:$src, 0))))),
-              (!cast<Instruction>("V"#OpcPrefix#Zr_Int) _.VT:$dst, _.VT:$src)>;
-  }
-}
-
-defm : AVX512_scalar_unary_math_patterns<fsqrt, "SQRTSS", X86Movss, v4f32x_info>;
-defm : AVX512_scalar_unary_math_patterns<fsqrt, "SQRTSD", X86Movsd, v2f64x_info>;
-
-multiclass AVX512_scalar_unary_math_imm_patterns<SDNode OpNode, string OpcPrefix,
-                                                 SDNode Move, X86VectorVTInfo _,
-                                                 bits<8> ImmV> {
-  let Predicates = [HasAVX512] in {
-    def : Pat<(_.VT (Move _.VT:$dst,
-                     (scalar_to_vector (OpNode (extractelt _.VT:$src, 0))))),
-              (!cast<Instruction>("V"#OpcPrefix#Zr_Int) _.VT:$dst, _.VT:$src,
-                                                        (i32 ImmV))>;
-  }
-}
-
-defm : AVX512_scalar_unary_math_imm_patterns<ffloor, "RNDSCALESS", X86Movss,
-                                             v4f32x_info, 0x01>;
-defm : AVX512_scalar_unary_math_imm_patterns<fceil, "RNDSCALESS", X86Movss,
-                                             v4f32x_info, 0x02>;
-defm : AVX512_scalar_unary_math_imm_patterns<ffloor, "RNDSCALESD", X86Movsd,
-                                             v2f64x_info, 0x01>;
-defm : AVX512_scalar_unary_math_imm_patterns<fceil, "RNDSCALESD", X86Movsd,
-                                             v2f64x_info, 0x02>;
 
 //===----------------------------------------------------------------------===//
 // AES instructions
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td
index b15ac4a378e..69f71295300 100644
--- a/llvm/lib/Target/X86/X86InstrSSE.td
+++ b/llvm/lib/Target/X86/X86InstrSSE.td
@@ -2647,13 +2647,13 @@ multiclass scalar_math_patterns<SDNode Op, string OpcPrefix, SDNode Move,
     def : Pat<(VT (Move (VT VR128:$dst), (VT (scalar_to_vector
           (Op (EltTy (extractelt (VT VR128:$dst), (iPTR 0))),
           RC:$src))))),
-      (!cast<Instruction>(OpcPrefix#rr_Int) VT:$dst,
+      (!cast<I>(OpcPrefix#rr_Int) VT:$dst,
           (COPY_TO_REGCLASS RC:$src, VR128))>;
 
     // vector math op with insert via movss/movsd
     def : Pat<(VT (Move (VT VR128:$dst),
           (Op (VT VR128:$dst), (VT VR128:$src)))),
-      (!cast<Instruction>(OpcPrefix#rr_Int) VT:$dst, VT:$src)>;
+      (!cast<I>(OpcPrefix#rr_Int) VT:$dst, VT:$src)>;
    }
 
    // Repeat for AVX versions of the instructions.
@@ -2662,13 +2662,13 @@ multiclass scalar_math_patterns<SDNode Op, string OpcPrefix, SDNode Move,
     def : Pat<(VT (Move (VT VR128:$dst), (VT (scalar_to_vector
           (Op (EltTy (extractelt (VT VR128:$dst), (iPTR 0))),
           RC:$src))))),
-      (!cast<Instruction>("V"#OpcPrefix#rr_Int) VT:$dst,
+      (!cast<I>("V"#OpcPrefix#rr_Int) VT:$dst,
           (COPY_TO_REGCLASS RC:$src, VR128))>;
 
     // vector math op with insert via movss/movsd
     def : Pat<(VT (Move (VT VR128:$dst),
           (Op (VT VR128:$dst), (VT VR128:$src)))),
-      (!cast<Instruction>("V"#OpcPrefix#rr_Int) VT:$dst, VT:$src)>;
+      (!cast<I>("V"#OpcPrefix#rr_Int) VT:$dst, VT:$src)>;
    }
 }
 
@@ -2927,14 +2927,14 @@ multiclass scalar_unary_math_patterns<SDNode OpNode, string OpcPrefix, SDNode Mo
   let Predicates = [BasePredicate] in {
     def : Pat<(VT (Move VT:$dst, (scalar_to_vector
                                   (OpNode (extractelt VT:$src, 0))))),
-              (!cast<Instruction>(OpcPrefix#r_Int) VT:$dst, VT:$src)>;
+              (!cast<I>(OpcPrefix#r_Int) VT:$dst, VT:$src)>;
   }
 
   // Repeat for AVX versions of the instructions.
-  let Predicates = [UseAVX] in {
+  let Predicates = [HasAVX] in {
     def : Pat<(VT (Move VT:$dst, (scalar_to_vector
                                   (OpNode (extractelt VT:$src, 0))))),
-              (!cast<Instruction>("V"#OpcPrefix#r_Int) VT:$dst, VT:$src)>;
+              (!cast<I>("V"#OpcPrefix#r_Int) VT:$dst, VT:$src)>;
   }
 }
 
@@ -2944,14 +2944,14 @@ multiclass scalar_unary_math_imm_patterns<SDNode OpNode, string OpcPrefix, SDNod
   let Predicates = [BasePredicate] in {
     def : Pat<(VT (Move VT:$dst, (scalar_to_vector
                                   (OpNode (extractelt VT:$src, 0))))),
-              (!cast<Instruction>(OpcPrefix#r_Int) VT:$dst, VT:$src, (i32 ImmV))>;
+              (!cast<Ii8>(OpcPrefix#r_Int) VT:$dst, VT:$src, (i32 ImmV))>;
   }
 
   // Repeat for AVX versions of the instructions.
-  let Predicates = [UseAVX] in {
+  let Predicates = [HasAVX] in {
     def : Pat<(VT (Move VT:$dst, (scalar_to_vector
                                   (OpNode (extractelt VT:$src, 0))))),
-              (!cast<Instruction>("V"#OpcPrefix#r_Int) VT:$dst, VT:$src, (i32 ImmV))>;
+              (!cast<Ii8>("V"#OpcPrefix#r_Int) VT:$dst, VT:$src, (i32 ImmV))>;
   }
 }
 
@@ -2963,13 +2963,13 @@ multiclass scalar_unary_math_intr_patterns<Intrinsic Intr, string OpcPrefix,
                                            Predicate BasePredicate> {
   let Predicates = [BasePredicate] in {
     def : Pat<(VT (Move VT:$dst, (Intr VT:$src))),
-              (!cast<Instruction>(OpcPrefix#r_Int) VT:$dst, VT:$src)>;
+              (!cast<I>(OpcPrefix#r_Int) VT:$dst, VT:$src)>;
   }
 
   // Repeat for AVX versions of the instructions.
   let Predicates = [HasAVX] in {
     def : Pat<(VT (Move VT:$dst, (Intr VT:$src))),
-              (!cast<Instruction>("V"#OpcPrefix#r_Int) VT:$dst, VT:$src)>;
+              (!cast<I>("V"#OpcPrefix#r_Int) VT:$dst, VT:$src)>;
   }
 }