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authorCraig Topper <craig.topper@intel.com>2018-04-04 04:38:55 +0000
committerCraig Topper <craig.topper@intel.com>2018-04-04 04:38:55 +0000
commitafa22edcf08ab18f8bd2d2b7412b65707b6da3e2 (patch)
tree8083d8cd66687f38d8d0283a9d7592593a80e2cf /llvm/lib/Target
parent3064c15dc31c5dbb84918fbc3b4fa836be5e7aea (diff)
downloadbcm5719-llvm-afa22edcf08ab18f8bd2d2b7412b65707b6da3e2.tar.gz
bcm5719-llvm-afa22edcf08ab18f8bd2d2b7412b65707b6da3e2.zip
[X86] Remove dead code for handling i8/i16 UMUL_LOHI/SMUL_LOHI from X86ISelDAGToDAG.cpp. NFC
These are promoted to i16/i32 multiplies by a DAG combine. llvm-svn: 329147
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86ISelDAGToDAG.cpp12
1 files changed, 0 insertions, 12 deletions
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 1edeb85ddb0..a8406781ba8 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -2816,8 +2816,6 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
if (!isSigned) {
switch (NVT.SimpleTy) {
default: llvm_unreachable("Unsupported VT!");
- case MVT::i8: Opc = X86::MUL8r; MOpc = X86::MUL8m; break;
- case MVT::i16: Opc = X86::MUL16r; MOpc = X86::MUL16m; break;
case MVT::i32: Opc = hasBMI2 ? X86::MULX32rr : X86::MUL32r;
MOpc = hasBMI2 ? X86::MULX32rm : X86::MUL32m; break;
case MVT::i64: Opc = hasBMI2 ? X86::MULX64rr : X86::MUL64r;
@@ -2826,8 +2824,6 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
} else {
switch (NVT.SimpleTy) {
default: llvm_unreachable("Unsupported VT!");
- case MVT::i8: Opc = X86::IMUL8r; MOpc = X86::IMUL8m; break;
- case MVT::i16: Opc = X86::IMUL16r; MOpc = X86::IMUL16m; break;
case MVT::i32: Opc = X86::IMUL32r; MOpc = X86::IMUL32m; break;
case MVT::i64: Opc = X86::IMUL64r; MOpc = X86::IMUL64m; break;
}
@@ -2836,14 +2832,6 @@ void X86DAGToDAGISel::Select(SDNode *Node) {
unsigned SrcReg, LoReg, HiReg;
switch (Opc) {
default: llvm_unreachable("Unknown MUL opcode!");
- case X86::IMUL8r:
- case X86::MUL8r:
- SrcReg = LoReg = X86::AL; HiReg = X86::AH;
- break;
- case X86::IMUL16r:
- case X86::MUL16r:
- SrcReg = LoReg = X86::AX; HiReg = X86::DX;
- break;
case X86::IMUL32r:
case X86::MUL32r:
SrcReg = LoReg = X86::EAX; HiReg = X86::EDX;
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