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author | Craig Topper <craig.topper@intel.com> | 2017-09-26 21:35:06 +0000 |
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committer | Craig Topper <craig.topper@intel.com> | 2017-09-26 21:35:06 +0000 |
commit | ab3c0075b8f8cb9475ca8eb0e5b2af1c0575ef10 (patch) | |
tree | 901b164005adbd130699c99cecdecbc3180c5725 /llvm/lib/Target | |
parent | 0768bced3946d043c3ee6d8de978fc0a25a35b2f (diff) | |
download | bcm5719-llvm-ab3c0075b8f8cb9475ca8eb0e5b2af1c0575ef10.tar.gz bcm5719-llvm-ab3c0075b8f8cb9475ca8eb0e5b2af1c0575ef10.zip |
[X86] Don't emit X86::MOV8rr_NOREX from X86InstrInfo::copyPhysReg.
This hook is called after register allocation with two physical registers. We don't need a separate instruction at that time to force register class constraints. I left in the assert though. We also have a fatal error in X86MCCodeEmitter if we ever encode an H-reg and a REX prefix.
llvm-svn: 314248
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 0561bcd8d0a..04cde5e4c63 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -6600,16 +6600,14 @@ void X86InstrInfo::copyPhysReg(MachineBasicBlock &MBB, else if (X86::GR16RegClass.contains(DestReg, SrcReg)) Opc = X86::MOV16rr; else if (X86::GR8RegClass.contains(DestReg, SrcReg)) { - // Copying to or from a physical H register on x86-64 requires a NOREX - // move. Otherwise use a normal move. - if ((isHReg(DestReg) || isHReg(SrcReg)) && - Subtarget.is64Bit()) { - Opc = X86::MOV8rr_NOREX; + // Copying to or from a physical H register on x86-64 must ensure it + // doesn't require a REX prefix for the other register. + if ((isHReg(DestReg) || isHReg(SrcReg)) && Subtarget.is64Bit()) { // Both operands must be encodable without an REX prefix. assert(X86::GR8_NOREXRegClass.contains(SrcReg, DestReg) && "8-bit H register can not be copied outside GR8_NOREX"); - } else - Opc = X86::MOV8rr; + } + Opc = X86::MOV8rr; } else if (X86::VR64RegClass.contains(DestReg, SrcReg)) Opc = X86::MMX_MOVQ64rr; |