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| author | Hiroshi Inoue <inouehrs@jp.ibm.com> | 2017-06-24 16:00:26 +0000 |
|---|---|---|
| committer | Hiroshi Inoue <inouehrs@jp.ibm.com> | 2017-06-24 16:00:26 +0000 |
| commit | a85d24b73d57ebfb657c4e1971e32b8afc44ea54 (patch) | |
| tree | 4354603c7c74d9c2598ef2fe8b95b5ae378b79e3 /llvm/lib/Target | |
| parent | b300824ee72224ad0887225b99b7e56997cdc3d3 (diff) | |
| download | bcm5719-llvm-a85d24b73d57ebfb657c4e1971e32b8afc44ea54.tar.gz bcm5719-llvm-a85d24b73d57ebfb657c4e1971e32b8afc44ea54.zip | |
fix trivial typos in comment, NFC
llvm-svn: 306211
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64SchedA57.td | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SchedA57.td b/llvm/lib/Target/AArch64/AArch64SchedA57.td index 303398ea0b7..5d1608ef04a 100644 --- a/llvm/lib/Target/AArch64/AArch64SchedA57.td +++ b/llvm/lib/Target/AArch64/AArch64SchedA57.td @@ -13,7 +13,7 @@ //===----------------------------------------------------------------------===// //===----------------------------------------------------------------------===// -// The Cortex-A57 is a traditional superscaler microprocessor with a +// The Cortex-A57 is a traditional superscalar microprocessor with a // conservative 3-wide in-order stage for decode and dispatch. Combined with the // much wider out-of-order issue stage, this produced a need to carefully // schedule micro-ops so that all three decoded each cycle are successfully |
